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Groups > linux.kernel > #1227987
| From | Roger Quadros <rogerq@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 21/27] ARM: dts: dra7x-evm: Provide NAND ready pin |
| Date | 2015-09-18 17:00 +0200 |
| Message-ID | <qa5iQ-5JO-69@gated-at.bofh.it> (permalink) |
| References | <qa5iO-5JO-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. Read speed increases from 13768 KiB/ to 17246 KiB/s. Write speed was unchanged at 7123 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm/boot/dts/dra7-evm.dts | 1 + arch/arm/boot/dts/dra72-evm.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 8a31161..4760562 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -591,6 +591,7 @@ reg = <0 0 4>; /* device IO registers */ interrupt-parent = <&crossbar_mpu>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 245f5f9..a11a646 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -405,6 +405,7 @@ reg = <0 0 4>; /* device IO registers */ interrupt-parent = <&crossbar_mpu>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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[PATCH v3 00/27] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 25/27] ARM: dts: am335x: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 15/27] memory: omap-gpmc: Support general purpose input for WAITPINs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 26/27] ARM: dts: dm816x: Fix gpmc and NAND node Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 22/27] ARM: dts: am437x: Fix NAND device nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 10/27] mtd: nand: omap: Copy platform data parameters to omap_nand_info data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 20/27] ARM: dts: dra7: Fix NAND device nodes. Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 19/27] memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 13/27] memory: omap-gpmc: Prevent mapping into 1st 16MB Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 18/27] mtd: nand: omap2: Implement NAND ready using gpiolib Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 21/27] ARM: dts: dra7x-evm: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 11/27] mtd: nand: omap: Clean up device tree support Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 05/27] memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 27/27] ARM: dts: omap3: Fix gpmc and NAND nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 14/27] memory: omap-gpmc: Move device tree binding to correct location Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 17/27] memory: omap-gpmc: Add irqchip support to the gpiochip Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 09/27] mtd: nand: omap2: manage NAND interrupts Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 12/27] mtd: nand: omap: Update DT binding documentation Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 07/27] memory: omap-gpmc: Remove NAND IRQ code Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 16/27] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 04/27] mtd: nand: omap2: Use gpmc_omap_get_nand_ops() to get NAND registers Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 08/27] memory: omap-gpmc: Add IRQ ops for GPMC-NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 02/27] ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 01/27] ARM: OMAP2+: gpmc: Add platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 03/27] memory: omap-gpmc: Introduce GPMC to NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 06/27] mtd: nand: omap2: Switch to using GPMC-NAND ops for writebuffer empty check Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200
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