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Groups > linux.kernel > #1228031
| From | Roger Quadros <rogerq@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 12/27] mtd: nand: omap: Update DT binding documentation |
| Date | 2015-09-18 17:20 +0200 |
| Message-ID | <qa5Ca-6mB-25@gated-at.bofh.it> (permalink) |
| References | <qa5iO-5JO-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Add compatible id and interrupts. The NAND interrupts are
provided by the GPMC controller node.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index fb733c4..253e6de 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -13,7 +13,11 @@ Documentation/devicetree/bindings/mtd/nand.txt
Required properties:
- - reg: The CS line the peripheral is connected to
+ - compatible: "ti,omap2-nand"
+ - reg: range id (CS number), base offset and length of the
+ NAND I/O space
+ - interrupt-parent: must point to gpmc node
+ - interrupts: gpmc interrupt
Optional properties:
@@ -55,20 +59,24 @@ Example for an AM33xx board:
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
- reg = <0x50000000 0x1000000>;
+ reg = <0x50000000 0x36c>;
interrupts = <100>;
gpmc,num-cs = <8>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
- ranges = <0 0 0x08000000 0x2000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x1000000>; /* CS0 space, 16MB */
elm_id = <&elm>;
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* CS0, offset 0, NAND I/O window 4 */
+ interrupts = <100>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled";
+ interrupt-parent = <&gpmc>;
+ interrupts = <0>, <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
--
2.1.4
--
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[PATCH v3 00/27] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 25/27] ARM: dts: am335x: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 15/27] memory: omap-gpmc: Support general purpose input for WAITPINs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 26/27] ARM: dts: dm816x: Fix gpmc and NAND node Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 22/27] ARM: dts: am437x: Fix NAND device nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 10/27] mtd: nand: omap: Copy platform data parameters to omap_nand_info data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 20/27] ARM: dts: dra7: Fix NAND device nodes. Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 19/27] memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 13/27] memory: omap-gpmc: Prevent mapping into 1st 16MB Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 18/27] mtd: nand: omap2: Implement NAND ready using gpiolib Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 21/27] ARM: dts: dra7x-evm: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 11/27] mtd: nand: omap: Clean up device tree support Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 05/27] memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 27/27] ARM: dts: omap3: Fix gpmc and NAND nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 14/27] memory: omap-gpmc: Move device tree binding to correct location Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 17/27] memory: omap-gpmc: Add irqchip support to the gpiochip Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 09/27] mtd: nand: omap2: manage NAND interrupts Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 12/27] mtd: nand: omap: Update DT binding documentation Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 07/27] memory: omap-gpmc: Remove NAND IRQ code Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 16/27] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 04/27] mtd: nand: omap2: Use gpmc_omap_get_nand_ops() to get NAND registers Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 08/27] memory: omap-gpmc: Add IRQ ops for GPMC-NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 02/27] ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 01/27] ARM: OMAP2+: gpmc: Add platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 03/27] memory: omap-gpmc: Introduce GPMC to NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 06/27] mtd: nand: omap2: Switch to using GPMC-NAND ops for writebuffer empty check Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200
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