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Groups > linux.kernel > #1228045
| From | Roger Quadros <rogerq@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 16/27] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring |
| Date | 2015-09-18 17:20 +0200 |
| Message-ID | <qa5Cc-6mB-65@gated-at.bofh.it> (permalink) |
| References | <qa5iO-5JO-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
If the device attached to GPMC wants to use the WAIT pin
for WAIT monitoring then we reserve it internally for
exclusive use.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/memory/omap-gpmc.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
index 518b418..fdf19eeb 100644
--- a/drivers/memory/omap-gpmc.c
+++ b/drivers/memory/omap-gpmc.c
@@ -1779,6 +1779,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
const char *name;
int ret, cs;
u32 val;
+ struct gpio_desc *waitpin_desc = NULL;
+ struct gpmc_device *gpmc = platform_get_drvdata(pdev);
if (of_property_read_u32(child, "reg", &cs) < 0) {
dev_err(&pdev->dev, "%s has no 'reg' property\n",
@@ -1880,15 +1882,28 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
goto err;
}
+ /* Reserve wait pin if it is required and valid */
+ if (gpmc_s.wait_on_read || gpmc_s.wait_on_write) {
+ unsigned wait_pin = gpmc_s.wait_pin;
+
+ waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip,
+ wait_pin, "WAITPIN");
+ if (IS_ERR(waitpin_desc)) {
+ dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin);
+ ret = PTR_ERR(waitpin_desc);
+ goto err;
+ }
+ }
+
ret = gpmc_cs_program_settings(cs, &gpmc_s);
if (ret < 0)
- goto err;
+ goto err_cs;
ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s);
if (ret) {
dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n",
child->name);
- goto err;
+ goto err_cs;
}
/* Clear limited address i.e. enable A26-A11 */
@@ -1919,6 +1934,10 @@ err_child_fail:
dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name);
ret = -ENODEV;
+err_cs:
+ if (waitpin_desc)
+ gpiochip_free_own_desc(waitpin_desc);
+
err:
gpmc_cs_free(cs);
--
2.1.4
--
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[PATCH v3 00/27] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 25/27] ARM: dts: am335x: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 15/27] memory: omap-gpmc: Support general purpose input for WAITPINs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 26/27] ARM: dts: dm816x: Fix gpmc and NAND node Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 22/27] ARM: dts: am437x: Fix NAND device nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 10/27] mtd: nand: omap: Copy platform data parameters to omap_nand_info data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 20/27] ARM: dts: dra7: Fix NAND device nodes. Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 19/27] memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 13/27] memory: omap-gpmc: Prevent mapping into 1st 16MB Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 18/27] mtd: nand: omap2: Implement NAND ready using gpiolib Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 21/27] ARM: dts: dra7x-evm: Provide NAND ready pin Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 11/27] mtd: nand: omap: Clean up device tree support Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 05/27] memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 27/27] ARM: dts: omap3: Fix gpmc and NAND nodes Roger Quadros <rogerq@ti.com> - 2015-09-18 17:00 +0200 [PATCH v3 14/27] memory: omap-gpmc: Move device tree binding to correct location Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 17/27] memory: omap-gpmc: Add irqchip support to the gpiochip Roger Quadros <rogerq@ti.com> - 2015-09-18 17:10 +0200 [PATCH v3 09/27] mtd: nand: omap2: manage NAND interrupts Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 12/27] mtd: nand: omap: Update DT binding documentation Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 07/27] memory: omap-gpmc: Remove NAND IRQ code Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 16/27] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring Roger Quadros <rogerq@ti.com> - 2015-09-18 17:20 +0200 [PATCH v3 04/27] mtd: nand: omap2: Use gpmc_omap_get_nand_ops() to get NAND registers Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 08/27] memory: omap-gpmc: Add IRQ ops for GPMC-NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 02/27] ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 01/27] ARM: OMAP2+: gpmc: Add platform data Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 03/27] memory: omap-gpmc: Introduce GPMC to NAND interface Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200 [PATCH v3 06/27] mtd: nand: omap2: Switch to using GPMC-NAND ops for writebuffer empty check Roger Quadros <rogerq@ti.com> - 2015-09-18 17:30 +0200
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