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Re: Mercury

From "Carlos E.R." <robin_listas@es.invalid>
Newsgroups comp.os.linux.misc, alt.unix.geeks
Subject Re: Mercury
Followup-To alt.unix.geeks
Date 2026-04-03 14:38 +0200
Message-ID <nuo4amxk3s.ln2@Telcontar.valinor> (permalink)
References (7 earlier) <tr12amxjrq.ln2@Telcontar.valinor> <goqdne0QMPjDNVP0nZ2dnZfqnPednZ2d@giganews.com> <10qn15c$1hpad$1@dont-email.me> <U8ucnYMDksbRtlL0nZ2dnZfqn_adnZ2d@giganews.com> <10qnboc$1kfdg$1@dont-email.me>

Cross-posted to 2 groups.

Followups directed to: alt.unix.geeks

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{Note Followups-To} ==== means ====> do not post on comp.os.linux.misc

On 2026-04-03 05:21, Rich wrote:
> c186282 <c186282@nnada.net> wrote:
>> On 4/2/26 20:21, Rich wrote:
>>> c186282 <c186282@nnada.net> wrote:
>>>> On 4/2/26 07:51, Carlos E.R. wrote:
>>>>> On 2026-04-02 04:32, c186282 wrote:
>>>>>> On 4/1/26 21:33, Carlos E.R. wrote:
>>>>>>> On 2026-04-02 02:18, c186282 wrote:
>>>>>>>> On 2026-04-01 21:16, c186282 wrote:
>>>>>>>>
>>>>>>>>      Not too long before he died he asked me to explain
>>>>>>>>      exactly how a CPU worked - and I found I could not
>>>>>>>>      provide a low-level description. Still can't, have
>>>>>>>>      no idea how instruction-fetch/decode/data-routing
>>>>>>>>      works at the bare transistor level.
>>>>>>>
>>>>>>> It is actually simple, but using gates, not transistors. Well,
>>>>>>> transistors is one step further, each group form a gate. And a group
>>>>>>> of gates form functions, like registers. It is overwhelming from
>>>>>>> scratch, but if someone explains a function at a time, it becomes
>>>>>>> "understandable". At least an old 8 bit CPU, like the 8085 or 6502. A
>>>>>>> modern one is more steps in complexity.
>>>>>>
>>>>>>      I tried to study a 4004 ... but still couldn't
>>>>>>      really assemble a mental model of how the needed
>>>>>>      steps were done at the lowest level.
>>>>>>
>>>>>>      'Gates' are made from transistors. Those I get
>>>>>>      just fine ... but how to build a CPU "machine"
>>>>>>      out of them ............
>>>>>
>>>>> You need somebody explaining it. Or a book that explains it. Trying to
>>>>> study it doesn't work. It is complex, but there is a trick, a method of
>>>>> explaining it and suddenly the mind does "click!" and you understand it
>>>>> all.
>>>>
>>>>     Could never get the 'click' alas. The sheer complexity of
>>>>     how even a 'simple' CPU works is daunting. Oh well, too
>>>>     old now, I'll never get it. Can form an abstract picture,
>>>>     but the silicon details ... nope .....
>>>
>>> If you've no experience in the area, then trying to study a 4004 to
>>> determine how a CPU works is still *way* too far up the complexity
>>> curve to be able to easily grasp (absent a Herculean amount of effort).
>>>
>>> Do you "get" how an assembly line (i.e., auto assembly line) works?
>>>
>>> A loose (very loose) analagy is a CPU works somewhat like an auto
>>> assembly line.  Everything moves along a step at a time on the line in
>>> unison to a clock pulse, and each stopping point on the "line" does
>>> some small bit towards completion of the action called for by the
>>> instruction.  For this analogy the 'instructions' would be the cars
>>> moving down the line.
>>
>>    I get it in the abstract ... but how to get transistors
>>    to do it all click-click-click - sorry. The complexity
>>    becomes daunting VERY fast.
> 
> If you have no experience in the area, agreed.
> 
> But if you do, the leap from transistors to simple clocked circuits
> (and a CPU is simply a large clocked circuit) is not really that hard.
> 
> But, to get the leap between the two, you first have to understand how
> transistors can make logic gates (individual AND, OR, XOR gates) and
> then how those logic gates can themselves (if viewed as the "atomic
> element" in the system) be used to create flip-flops.  Once you get
> that much, then the flip-flop is extended a bit into a gated (or
> clocked) flip-flop.  Once you get there, then a CPU is really just (in
> one manner of viewing it) a huge number of gated flip-flops all
> marching to the same clock signal.  The clocked flip-flop design is the
> secret behind how all the transistors do it click-clack-click.
> 
> This wikipedia page shows (in the first portions) some transistor level
> flip-flop designs.
> 
> https://en.wikipedia.org/wiki/Flip-flop_(electronics)
> 
> and then transitions into logic gates as the smallest element of the
> internals of a flip-flop (consider each logic gate as being the same
> "transistor design" inside, i.e., all or gates being the same internal
> transistor design [which is not far from the truth with modern design
> software]).  Then it adds gating to the basic flip-flops, and it is the
> gating that allows the "everything moves in reference to the clock
> signal" part.
> 
>>    In reference, my old uncle wanted to know how it was done at the
>>    transistor (or 'valve') level.  If he was a bit younger he'd
>>    probably have tried to make a CPU out of vacuum tubes :-)
> 
> He'd have had a *lot* of vacuum tubes, and the power draw and heat
> dissipation would have been huge, but for a really simple CPU, it can
> be done.
> 
> Part of being able to understand it is being able to compartmentalize
> the aspects.  When looking at a bunch of clock synchronous gated
> flip-flops you don't bother thinking about the internal logic gates
> that make them up, you just have "gated flip-flops" as your smallest
> "lego" piece.  In the rare instance you need to worry about what's
> going on inside one flip-flop, you look at its insides as logic gates
> and don't think about the transistors that are inside.  The layering of
> abstractions helps keep the overall complexity managable.

Right.

> 
> But, it isn't something easy to convey in a short explanation to one's
> elderly uncle.

Nope, that can't be done. A gate, probably.

-- 
Cheers, Carlos.
ES🇪🇸, EU🇪🇺;

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Re: Mercury rbowman <bowman@montana.com> - 2026-03-31 02:30 +0000
  Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-03-31 12:58 +0200
    Re: Mercury rbowman <bowman@montana.com> - 2026-03-31 20:10 +0000
      Re: Mercury Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-03-31 22:03 +0000
        Re: Mercury rbowman <bowman@montana.com> - 2026-04-01 04:37 +0000
        Re: Mercury The Natural Philosopher <tnp@invalid.invalid> - 2026-04-01 13:26 +0100
          Re: Mercury c186282 <c186282@nnada.net> - 2026-04-01 09:03 -0400
            Re: Mercury Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2026-04-01 17:58 +0000
              Re: Mercury c186282 <c186282@nnada.net> - 2026-04-01 15:16 -0400
                Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-04-01 21:57 +0200
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-01 20:18 -0400
                Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-04-02 03:33 +0200
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-01 22:32 -0400
                Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-04-02 13:51 +0200
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-02 13:33 -0400
                Re: Mercury Rich <rich@example.invalid> - 2026-04-03 00:21 +0000
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-02 22:51 -0400
                Re: Mercury Rich <rich@example.invalid> - 2026-04-03 03:21 +0000
                Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-04-03 14:38 +0200
                Re: Mercury rbowman <bowman@montana.com> - 2026-04-03 06:22 +0000
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                Re: Mercury "Carlos E.R." <robin_listas@es.invalid> - 2026-04-03 14:33 +0200
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-03 11:06 -0400
                Re: Mercury Rich <rich@example.invalid> - 2026-04-03 16:51 +0000
                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-03 14:47 -0400
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                Re: CPU design "Carlos E.R." <robin_listas@es.invalid> - 2026-04-04 22:18 +0200
                Re: CPU design Rich <rich@example.invalid> - 2026-04-05 03:44 +0000
                Re: CPU design "Carlos E.R." <robin_listas@es.invalid> - 2026-04-05 13:58 +0200
                Re: CPU design c186282 <c186282@nnada.net> - 2026-04-05 17:19 -0400
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                Re: Mercury Rich <rich@example.invalid> - 2026-04-03 21:57 +0000
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                Re: Mercury c186282 <c186282@nnada.net> - 2026-04-03 22:29 -0400
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