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Re: Arm registers

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Maybe I should take a look at the version 8 text. Thanks

Hul

antispam@math.uni.wroc.pl wrote:
> Hul Tytus <ht@panix.com> wrote:
> > David - I'm in the process of putting together an assembler for the Arm
> > 32 bit processors. There is no all-knowing compiler envolved so I need
> > to know what machine codes are valid for a given processor. Any suggestions
> > on where that information can be found?

> If you think about microcontrollers, then most relevant probably
> is ARM v8-M Architecture Reference Manual which I found under
> file name DDI0553A_e_armv8m_arm.pdf

> It contains list of instructions with their encodings. v8 is resonably
> recent (maybe newest) version of ARM architecture.  Since ARM is
> mostly adding instructions it probably covers all intructions that
> you want to support.  ARM defined several subsets, for example
> Cortex -M3 Devices Generic User Guide file name
> DUI0552A_cortex_m3_dgug.pdf describes Cortex M3, in particular
> provides list of valid instructions.

> Collectiong information that you need looks like large and tedious
> job: you need to check instruction descriptions to know if
> instruction is valid for given subset (given mnemonic may be
> valid, but specific combination of argument may be invalid).
> I am not aware any documents containing needed data is
> syntetic form.  You may try a shortcut: generate "program"
> that contains all varianants of all instructions and look
> which one GNU assembler accepts for given subset (model).
> Of course, in this way you will repeat any bugs in tables
> in GNU assembler.  OTOH tables in GNU assembler are probably
> debugged at least as well as ARM documents...

> -- 
>                               Waldek Hebisch

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Arm registers Hul Tytus <ht@panix.com> - 2021-04-16 19:30 +0000
  Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-16 16:20 -0400
    Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-16 22:12 +0000
      Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-16 19:41 -0400
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 15:43 +0000
          Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-17 21:45 +0100
            Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 13:57 +0000
              Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-18 16:31 +0100
                Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-19 21:22 +0000
  Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-17 12:43 +0200
    Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 15:53 +0000
      Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-17 18:50 +0200
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:30 +0000
          Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-18 15:02 +0200
      Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-17 13:16 -0400
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:23 +0000
        Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-17 21:42 +0100
      Re: Arm registers Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2021-04-17 21:09 +0300
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:38 +0000
          Re: Arm registers Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2021-04-18 11:44 +0300
            Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 14:07 +0000
          Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-18 15:10 +0200
      Re: Arm registers antispam@math.uni.wroc.pl - 2021-04-17 21:05 +0000
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 14:00 +0000

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