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Groups > comp.arch.embedded > #30444

Arm registers

From Hul Tytus <ht@panix.com>
Newsgroups comp.arch.embedded
Subject Arm registers
Date 2021-04-16 19:30 +0000
Organization PANIX Public Access Internet and UNIX, NYC
Message-ID <s5cok2$cfj$1@reader1.panix.com> (permalink)

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sci.electronics.design
Arm Cortex assembley code

    Does the Arm Cortex support both the "thumb" 16 bit machine codes and also 
the 32 bit codes? I had been under the impression that Cortex devices only 
provided the thumb codes but a little time going through "Arm v7-M 
Architecture Reference Manual" indicates otherwise. Whether or not that 
reference manual is suitable for Cortex information needs verification also. 
There may be a more pertinent text available.
   And another question: the thumb instructions show 8 available registers 
rather than 16. However, somewhere on the internet a site states that 16 
registers are available & which group of 8 varies with the "processor state". 
Any suggestions on an Arm manual or text that defines "processor state"? The 
CPS (change processor state) machine code description in the "Arm v7-M 
Architecture Reference Manual" doesn't mention register groups. 

Hul

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Thread

Arm registers Hul Tytus <ht@panix.com> - 2021-04-16 19:30 +0000
  Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-16 16:20 -0400
    Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-16 22:12 +0000
      Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-16 19:41 -0400
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 15:43 +0000
          Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-17 21:45 +0100
            Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 13:57 +0000
              Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-18 16:31 +0100
                Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-19 21:22 +0000
  Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-17 12:43 +0200
    Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 15:53 +0000
      Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-17 18:50 +0200
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:30 +0000
          Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-18 15:02 +0200
      Re: Arm registers Richard Damon <Richard@Damon-Family.org> - 2021-04-17 13:16 -0400
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:23 +0000
        Re: Arm registers Theo <theom+news@chiark.greenend.org.uk> - 2021-04-17 21:42 +0100
      Re: Arm registers Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2021-04-17 21:09 +0300
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-17 19:38 +0000
          Re: Arm registers Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2021-04-18 11:44 +0300
            Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 14:07 +0000
          Re: Arm registers David Brown <david.brown@hesbynett.no> - 2021-04-18 15:10 +0200
      Re: Arm registers antispam@math.uni.wroc.pl - 2021-04-17 21:05 +0000
        Re: Arm registers Hul Tytus <ht@panix.com> - 2021-04-18 14:00 +0000

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