Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > sci.electronics.design > #429959

Re: Input (protection) FET or npn

From Joerg <news@analogconsultants.com>
Newsgroups sci.electronics.design
Subject Re: Input (protection) FET or npn
Date 2016-09-30 12:38 -0700
Message-ID <e57t8eFap65U1@mid.individual.net> (permalink)
References <2ab9c28c-9be2-4569-bf51-56ba6febd9a7@googlegroups.com> <nsm6pg$jvp$1@dont-email.me> <3aa4af61-c2a5-42eb-8ef2-d269c8b641a1@googlegroups.com>

Show all headers | View raw


On 2016-09-30 11:40, George Herold wrote:
> On Friday, September 30, 2016 at 1:18:56 PM UTC-4, John S wrote:
>> On 9/30/2016 9:52 AM, George Herold wrote:
>>> Hi all a simple input circuit take a input pulse. And stretches it a bit.
>>> (from previous post on pulse stretching.)
>>> The input looks like this.. (bad asci art)
>>>
>>>                   +5V
>>>                    +--------+
>>>                    |       R(1M)
>>>                    _     ---+
>>>                    ^     |  |
>>>                    |   |/c  +--->'HC14
>>> pulse in---R(100)-+---|    |
>>>                    |   |\e  C(.1u)
>>>                    _     |  |
>>>                    ^     GND+
>>>                    |
>>>                   GND
>>>
>>> 100 ohms in series and diodes to the rails.
>>> I can then either drive a FET (2n7000) or npn (2n4401)
>>> both work fine.
>>> The exact width of the output pulse is not critical.
>>> Which is more robust?
>>>
>>> George H.
>>
>> What is the nature of the input pulse? 5V, 50V, 500V, etc? Energy
>> capability? 1us, 10us, 1000us, etc?
>>
>> Caution: If the input pulse is very energetic and of sufficient
>> voltage/energy, it could raise your 5V rail to device destruction.
>
> Well, I get to spec the input pulse.  5V logic, ~10 us minimum pulse width.
> But this goes to students and I have to assume almost anything that can
> come out of a function generator might be put into it.  ~+/- 20 V.
> And then ESD is always possible.
> I'll have a through hole FET, (or npn) so at some point the FET becomes a fuse...
> for those extrally energetic students.
>

I was designing electronics for one of the institutes at my university 
to up my student's budget a bit. On one of the first projects I asked 
"Is this a one-off for one of our labs or small series?" ... "Oh, yes, 
small series so it needs to be Ph.D.-proof". Then I knew what to do 8-)

You might want to place a big TVS across the supply and some sort of 
fuse, in case someone reverses polarity or turned the power supply on 
and the guy before had it on 24V. That could blow the lid off of the 
74HC14. I try to use CD4000 logic wherever possible because a TVS isn't 
a very exact spec part.

-- 
Regards, Joerg

http://www.analogconsultants.com/

Back to sci.electronics.design | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread


Thread

Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 07:52 -0700
  Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:05 -0700
    Re: Input (protection) FET or npn Frank Miles <fpm@u.washington.edu> - 2016-09-30 15:28 +0000
      Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:52 -0700
  Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 08:35 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:54 -0700
  Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 08:47 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 09:14 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 09:50 -0700
  Re: Input (protection) FET or npn John S <Sophi.2@invalid.org> - 2016-09-30 12:19 -0500
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 11:40 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 12:38 -0700
      Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 13:15 -0700

csiph-web