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Re: Input (protection) FET or npn

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On 2016-09-30 09:14, George Herold wrote:
> On Friday, September 30, 2016 at 11:47:15 AM UTC-4, Joerg wrote:
>> On 2016-09-30 07:52, George Herold wrote:
>>> Hi all a simple input circuit take a input pulse. And stretches it a bit.
>>> (from previous post on pulse stretching.)
>>> The input looks like this.. (bad asci art)
>>>
>>>                    +5V
>>>                     +--------+
>>>                     |       R(1M)
>>>                     _     ---+
>>>                     ^     |  |
>>>                     |   |/c  +--->'HC14
>>> pulse in---R(100)-+---|    |
>>>                     |   |\e  C(.1u)
>>>                     _     |  |
>>>                     ^     GND+
>>>                     |
>>>                    GND
>>>
>>> 100 ohms in series and diodes to the rails.
>>> I can then either drive a FET (2n7000) or npn (2n4401)
>>> both work fine.
>>> The exact width of the output pulse is not critical.
>>> Which is more robust?
>>>
>>
>> The FET is more robust. The main reason being that in this constellation
>> the BE junction gets hit with the full ESD current if the spike is
>> positive. The abs max base current peak for the 2N4401 is only 200mA.
>>
>> http://media.digikey.com/pdf/Data%20Sheets/NXP%20PDFs/2N4401.pdf
>>
>> The upper diode has no effect with the BJT in this scenario. Before that
>> comes the BE junction has gone phut.
> OK more base resistance then as suggested above.


Depends on the ESD rating you need and small resistors can be "jumped" 
by an ESD pulse. In the end it all depends on where this is used. I've 
had cases where ESD on outdoor equipment was extreme and caused a lot of 
grief until we fixed all areas where it could come in. For example, 
sneakers plus resin board decking (the artificial wood kind) plus a long 
enough walking distance are a recipe for an impressive zap.

>>
>> Hanging a 0.1uF emitter to ground is not so nice, high peak current.
>> Won't be destructive but it isn't considered very kosher. With a FET it
>> can be ok if the Rdson is guaranteed high enough so the abs max current
>> won't be exceeded. Else use a small resistor in series with the drain.
>
> OK, so the FET with 10-20 ohms in the drain line.
> https://www.fairchildsemi.com/datasheets/2N/2N7000.pdf
> (5v/500mA)
> Is there any reason not to increase the gate resistance too?
> (50 pF Cin.... ~50 ns TC...)
>

Sure you can. Keep in mind for your timing calculation that the gate 
capacitance is subject to process tolerances and with this FET can be 
anywhere between 10pF and 50pF.

-- 
Regards, Joerg

http://www.analogconsultants.com/

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Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 07:52 -0700
  Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:05 -0700
    Re: Input (protection) FET or npn Frank Miles <fpm@u.washington.edu> - 2016-09-30 15:28 +0000
      Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:52 -0700
  Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 08:35 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:54 -0700
  Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 08:47 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 09:14 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 09:50 -0700
  Re: Input (protection) FET or npn John S <Sophi.2@invalid.org> - 2016-09-30 12:19 -0500
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 11:40 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 12:38 -0700
      Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 13:15 -0700

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