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Re: Input (protection) FET or npn

From Joerg <news@analogconsultants.com>
Newsgroups sci.electronics.design
Subject Re: Input (protection) FET or npn
Date 2016-09-30 08:47 -0700
Message-ID <e57fnuF7hagU1@mid.individual.net> (permalink)
References <2ab9c28c-9be2-4569-bf51-56ba6febd9a7@googlegroups.com>

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On 2016-09-30 07:52, George Herold wrote:
> Hi all a simple input circuit take a input pulse. And stretches it a bit.
> (from previous post on pulse stretching.)
> The input looks like this.. (bad asci art)
>
>                   +5V
>                    +--------+
>                    |       R(1M)
>                    _     ---+
>                    ^     |  |
>                    |   |/c  +--->'HC14
> pulse in---R(100)-+---|    |
>                    |   |\e  C(.1u)
>                    _     |  |
>                    ^     GND+
>                    |
>                   GND
>
> 100 ohms in series and diodes to the rails.
> I can then either drive a FET (2n7000) or npn (2n4401)
> both work fine.
> The exact width of the output pulse is not critical.
> Which is more robust?
>

The FET is more robust. The main reason being that in this constellation 
the BE junction gets hit with the full ESD current if the spike is 
positive. The abs max base current peak for the 2N4401 is only 200mA.

http://media.digikey.com/pdf/Data%20Sheets/NXP%20PDFs/2N4401.pdf

The upper diode has no effect with the BJT in this scenario. Before that 
comes the BE junction has gone phut.

Hanging a 0.1uF emitter to ground is not so nice, high peak current. 
Won't be destructive but it isn't considered very kosher. With a FET it 
can be ok if the Rdson is guaranteed high enough so the abs max current 
won't be exceeded. Else use a small resistor in series with the drain.

-- 
Regards, Joerg

http://www.analogconsultants.com/

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Thread

Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 07:52 -0700
  Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:05 -0700
    Re: Input (protection) FET or npn Frank Miles <fpm@u.washington.edu> - 2016-09-30 15:28 +0000
      Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:52 -0700
  Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 08:35 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:54 -0700
  Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 08:47 -0700
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 09:14 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 09:50 -0700
  Re: Input (protection) FET or npn John S <Sophi.2@invalid.org> - 2016-09-30 12:19 -0500
    Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 11:40 -0700
      Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 12:38 -0700
      Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 13:15 -0700

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