Where is micro penis mental error? (Re: Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU)

From	Mild Shock <janburse@fastmail.fm>
Newsgroups	sci.logic, comp.lang.prolog, sci.physics
Subject	Where is micro penis mental error? (Re: Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU)
Date	2026-07-20 22:07 +0200
Message-ID	<113lv5o$4dh6$1@solani.org> (permalink)
References	(2 earlier) <113kfgk$3b4e$2@solani.org> <113l29d$3oqg$2@solani.org> <113lm87$4rml$2@solani.org> <113lmja$4s3m$1@solani.org> <113lut1$4dca$2@solani.org>

Cross-posted to 3 groups.

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Hi,

Maybe micro penis thinks if   assign 50% of my
32 GB memory, i.e. 16 GB to the GPU. That
the CPU can not anymore access it?

Traditional Integrated GPUs: When you manually
carve out 16 GB for the GPU in the BIOS, you
are creating a hard software partition. The
system locks that 16 GB exclusively for the
GPU to ensure it always has video memory.
While the CPU is physically wired to those
RAM chips, the operating system's memory
manager blocks the CPU from using that 16 GB
for general applications to prevent crashes.

Modern Unified Memory:
If you are using a chip like an Apple M-series,
there is no fixed partition. The CPU and GPU share
a single pool of 32 GB. If the GPU needs 16 GB for
an AI model, it allocates it dynamically. The CPU
can still read and write to that exact same 16 GB
address space simultaneously using shared pointers,
completely eliminating the need to copy data back and forth.

Bye

Mild Shock schrieb:
> Hi,
> 
>  > That's too located close to the same cpu, idiot.
> 
> Yes, colocating a CPU and GPU onto the same
> processor die or package provides massive b
> enefits, primarily by eliminating the latency
> and bandwidth bottlenecks of moving data
> across a motherboard.
> 
> Individual L1 Caches: Yes, the CPU cores and
> the GPU compute units (Streaming Multiprocessors /
> Compute Units) still maintain private,
> individual L1 caches.
> 
> The "Colocation" Benefit: In traditional
> setups (a separate CPU and GPU on PCIe slots),
> data must be copied from system RAM to the
> GPU's VRAM. When a CPU and GPU are colocated
> (like in Apple Silicon, AMD APUs, or Intel
> processors), they share a Unified Memory
> Architecture (UMA). Both processors can read
> and write to the exact same physical memory
> pool without redundant data copying
> 
> Shared Last-Level Cache: While the L1 caches
> remain separate, colocated architectures
> often share a high-capacity Last-Level
> Cache (L2 or L3). This allows the CPU and
> GPU to quickly pass data back and forth
> locally on the chip.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Just read something for once you alcoholic:
>>
>> GPU Cache Hierarchy: Understanding L1, L2, and VRAM
>> https://charlesgrassi.dev/blog/gpu-cache-hierarchy/
>>
>> Measuring Cache Efficiency
>>
>> GPU profilers like NVIDIA Nsight, AMD Radeon
>> GPU Profiler, and RenderDoc expose cache hit
>> rates and memory throughput. Key metrics to watch:
>>
>> - L1 Hit Rate: Should be >80% for well-optimized
>>      shaders. Below 60% indicates access pattern problems.
>> - L2 Hit Rate: Measures working set fit.
>>      Below 70% suggests texture thrashing or too many unique textures.
>> - Texture Memory Throughput: Compare to theoretical
>>      max. Low throughput with high latency = cache misses.
>> - Memory-bound vs Compute-bound: If memory is the
>>      bottleneck, cache optimization has highest impact.
>>
>> If the GPU is a discrete GPU, it has VRAM,
>> If the GPU is an accelerator processing unit (APU),
>> it shares the system memory with the CPU.
>>
>> In the APU scenrio often advanced unified memory
>> is used, which can be multi channel for example.
>> The high L1 and L2 hit rate for shaders, translates
>>
>> also to pi-WAM. Which shows, in the example I used,
>> a quite good GPU saturation, less memory bound and
>> more compute bound. I have compute these figures already.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>>
>>> Hi,
>>>
>>> You are a moron right? Modern GPU has its
>>> own L1,..,Ln caches. RTFM ASAP you brain
>>> amputated vodka alcoholic.
>>>
>>> Russian Hardbass - Crazy Dance
>>> https://www.youtube.com/watch?v=6OoglRuT0jY
>>>
>>> Bye
>>>
>>> Jeiker Makulov schrieb:
>>>  > Mild Shock wrote:
>>>  >
>>>  >> Yes of course, Micro Penis will know. Nothing, LoL But here we 
>>> find how
>>>  >> village idiot Micro Penis is.
>>>  >> The Cache Identity Crisis by Micro Penis:
>>>  >>
>>>  >> Claiming that L1/L2/L3 caches and core topology are "embedded cpu
>>>  >> registers area,
>>>  >> it has nothing to do with the ram." That is a brilliant piece of
>>>  >> hardware fiction.
>>>  >>
>>>  >> Caches are SRAM acting as a hierarchical
>>>  >
>>>  > imbecile, formatting code like that puts you in prison in normal
>>>  > countries. You are using entire lines for single chars, ie  "}" etc,
>>>  > imbecile.
>>>  >
>>>  > also, fucking lying illiterate imbecile
>>>  >
>>>  > L1, L2, and L3 caches are located on the CPU, not in the system 
>>> RAM. They
>>>  > form a high-speed memory hierarchy embedded directly within or 
>>> immediately
>>>  > adjacent to the processor cores to minimize data access latency.
>>>  >
>>>
>>
>

Thread

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  Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov (Re: I'm a spinner, I'm a sinner [Dmitry Vyukov for pi-WAM]) Mild Shock <janburse@fastmail.fm> - 2026-07-20 08:33 +0200
    The Cache Identity Crisis by Micro Penis (Re: Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov) Mild Shock <janburse@fastmail.fm> - 2026-07-20 13:54 +0200
      Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Mild Shock <janburse@fastmail.fm> - 2026-07-20 14:10 +0200
        The large memory tax: ECC RAM (Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-20 14:23 +0200
        Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-20 12:26 -0700
          Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) R Kym Horsell <kymhorsell@gmail.com> - 2026-07-20 22:20 +0000
            Friendly Reminder: GPU 10x more performant than CPU (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:39 +0200
              Breaking the CUDA edge in AI by WebGPU (Was: Friendly Reminder: GPU 10x more performant than CPU) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:56 +0200
                Like WebAssembly before it, WebGPU has "escaped" the browser. (Was: Breaking the CUDA edge in AI by WebGPU) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:05 +0200
                If you are paranoid you can use Falco [Agentic AI] (Re: Like WebAssembly before it, WebGPU has "escaped" the browser.) Mild Shock <janburse@fastmail.fm> - 2026-07-21 22:57 +0200
                What would an EMACS guru say [Windows Recall] (Re: If you are paranoid you can use Falco [Agentic AI]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 23:35 +0200
                Decide what you critique tiny winy penis (Re: What would an EMACS guru say [Windows Recall]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 08:17 +0200
                How confused is tiny winy penis? (Was: Decide what you critique tiny winy penis) Mild Shock <janburse@fastmail.fm> - 2026-07-22 08:28 +0200
                Maybe change your hobby, become a dog owner? (Was: How confused is tiny winy penis?) Mild Shock <janburse@fastmail.fm> - 2026-07-22 09:37 +0200
                Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis] (Re: Decide what you critique tiny winy penis ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:19 +0200
                node.js has also Worker isolation , headless (Was: Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:29 +0200
                Abyss hobby interpretation vs. professional understanding [Keep up with the Kardashians] (Re: node.js has also Worker isolation , headless) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:38 +0200
                Play stupid games, win classic Usenet prizes [CCCP Troll] (Re: Abyss hobby interpretation vs. professional understanding [Keep up with the Kardashians]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 12:16 +0200
                Glue Sniffing 5-Year Old Moron [CCCP Troll] (Was: Play stupid games, win classic Usenet prizes [CCCP Troll]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:29 +0200
                My Swift Go 16 AI has no IMEI, are you nuts? (Re: Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:15 +0200
                Same nickname and email, could post faster [5 year old moron] (Re: My Swift Go 16 AI has no IMEI, are you nuts? ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:25 +0200
                I have nothing to hide, you can find me in search.ch (Re: My Swift Go 16 AI has no IMEI, are you nuts?) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:41 +0200
                Where did I confirm German via .ch, you are more than nuts! (Re: I have nothing to hide, you can find me in search.ch) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:48 +0200
                Ask a Ukrainian Neighbour to do Detective [CCCP Troll] (Re: Where did I confirm German via .ch, you are more than nuts! ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:51 +0200
          Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-20 21:36 -0700
            rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 09:01 +0200
              Re: rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-21 00:56 -0700
      L1,..,Ln caches are located on the CPU AND on the GPU (Was: The Cache Identity Crisis by Micro Penis( Mild Shock <janburse@fastmail.fm> - 2026-07-20 19:35 +0200
        GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 19:40 +0200
          Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 22:02 +0200
            Where is micro penis mental error? (Re: Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 22:07 +0200
    I didn't find Futex in WebGPU / WGSL (Re: Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov) Mild Shock <janburse@fastmail.fm> - 2026-07-20 23:26 +0200
      There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:15 +0200
        OpenGL is dead. Apple said bye bye / Wayland Compositor (Re: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:26 +0200
        Flogging a Dead Horse, OpenGL is EOL (Re: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:39 +0200
          imageAtomicAdd trivial, Dmitry Vyukov requires capacity (Re: Flogging a Dead Horse, OpenGL is EOL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:40 +0200
            capacity = 2^n for some n / systolic system (Re: imageAtomicAdd trivial, Dmitry Vyukov requires capacity) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:41 +0200
              Source of the benchmark for DmitryVyukov (Was: capacity = 2^n for some n / systolic system) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:44 +0200
        Re: There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-20 16:59 -0700
          I never used OpenGL Version 4.2 and later (Was: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 08:47 +0200
            Because of MIMD you have to reassess algorithms (Re: I never used OpenGL Version 4.2 and later) Mild Shock <janburse@fastmail.fm> - 2026-07-21 09:02 +0200
              Why MIMD is interesting for pi-WAM? Mild Shock <janburse@fastmail.fm> - 2026-07-21 09:18 +0200
              Re: Because of MIMD you have to reassess algorithms (Re: I never used OpenGL Version 4.2 and later) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 13:34 -0700
                Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) Mild Shock <janburse@fastmail.fm> - 2026-07-23 00:09 +0200
                Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) Mild Shock <janburse@fastmail.fm> - 2026-07-23 00:53 +0200
                Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 18:00 -0700
                Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 18:20 -0700
                Why do you even need a mpmc queue? [Thunder Kittens] (Was: Do you see the loops, in C code and in Java code? /** Looping **/) Mild Shock <janburse@fastmail.fm> - 2026-07-24 14:44 +0200
                What does pi in pi-WAM mean? (Re: Why do you even need a mpmc queue? [Thunder Kittens]) Mild Shock <janburse@fastmail.fm> - 2026-07-24 14:53 +0200
                OR-parallelism or AND-parallelism? [MapReduce] (Was: What does pi in pi-WAM mean?) Mild Shock <janburse@fastmail.fm> - 2026-07-24 15:00 +0200
                It is all on GitHub , for the 100-th time! (Re: What does pi in pi-WAM mean?) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:13 +0200

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