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Groups > linux.kernel > #1240096 > unrolled thread

[PATCH 0/8] Armada 38x SDHCI driver improvements

Started byMarcin Wojtas <mw@semihalf.com>
First post2015-10-06 03:20 +0200
Last post2015-10-08 15:30 +0200
Articles 17 — 4 participants

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  [PATCH 0/8] Armada 38x SDHCI driver improvements Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
    [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
      Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-10-06 17:00 +0200
        Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada  38x SoC Marcin Wojtas <mw@semihalf.com> - 2015-10-06 17:10 +0200
      Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada  38x SoC Jisheng Zhang <jszhang@marvell.com> - 2015-10-09 03:20 +0200
        Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada  38x SoC Marcin Wojtas <mw@semihalf.com> - 2015-10-09 11:50 +0200
    [PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
      Re: [PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-10-06 16:50 +0200
    [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
      Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-10-06 17:00 +0200
      Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks Ulf Hansson <ulf.hansson@linaro.org> - 2015-10-08 19:40 +0200
        Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks Marcin Wojtas <mw@semihalf.com> - 2015-10-09 02:50 +0200
    [PATCH 8/8] mmc: sdhci-pxav3: enable modifying MMC_CARD bit during card initialization Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
    [PATCH 7/8] mmc: sdhci: add init_card callback to sdhci Marcin Wojtas <mw@semihalf.com> - 2015-10-06 03:20 +0200
    Re: [PATCH 0/8] Armada 38x SDHCI driver improvements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-10-06 16:50 +0200
      Re: [PATCH 0/8] Armada 38x SDHCI driver improvements Marcin Wojtas <mw@semihalf.com> - 2015-10-06 17:50 +0200
        Re: [PATCH 0/8] Armada 38x SDHCI driver improvements Marcin Wojtas <mw@semihalf.com> - 2015-10-08 15:30 +0200

#1240096 — [PATCH 0/8] Armada 38x SDHCI driver improvements

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 0/8] Armada 38x SDHCI driver improvements
Message-ID<qgp58-7Oq-3@gated-at.bofh.it>
Hi,

This series brings a couple of fixes and improvements to Armada 38x SDHCI
controller driver. First four patches are fixes, of which three are stable
CC'ed.

Another two add DAT3-pin based hardware card detection in the driver, what
should be used by the newest revisions of A388-GP boards.

The last patches enable MMC_CARD bit, using init_card() callback added to
SDHCI hosts.

Any remarks and comments are welcome.

Best regards,
Marcin

Marcin Wojtas (6):
  mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
  mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
  mmc: sdhci-pxav3: enable usage of DAT3 pin as HW card detect
  ARM: mvebu: enable SDHCI card detection using DAT3 pin on A388-GP
  mmc: sdhci: add init_card callback to sdhci
  mmc: sdhci-pxav3: enable modifying MMC_CARD bit during card
    initialization

Nadav Haklai (2):
  mmc: sdhci-pxav3: remove broken clock base quirk for Armada 38x sdhci
    driver
  mmc: sdhci-pxav3: disable clock inversion for HS MMC cards

 .../devicetree/bindings/mmc/sdhci-pxa.txt          |   5 +
 arch/arm/boot/dts/armada-388-gp.dts                |   3 +-
 drivers/mmc/host/sdhci-pxav3.c                     | 101 ++++++++++++++++-----
 drivers/mmc/host/sdhci.c                           |  14 ++-
 drivers/mmc/host/sdhci.h                           |   4 +
 5 files changed, 102 insertions(+), 25 deletions(-)

-- 
1.8.3.1

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#1240098 — [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
Message-ID<qgp58-7Oq-15@gated-at.bofh.it>
In reply to#1240096
When resuming from suspend on Armada 38x SoC MBus windows have to be
re-configured and for that purpose mv_conf_mbus_windows function needed
rework. MBus windows register base address obtaining was moved to
armada_38x_quirks function in order to be kept in pxa global structure,
because it is used during a resume.

This commit fixes resuming from suspend by calling MBus windows
configuration routine and therefore enabling proper DMA operation.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 drivers/mmc/host/sdhci-pxav3.c | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index f5edf9d..3f71894 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -63,6 +63,7 @@ struct sdhci_pxa {
 	struct clk *clk_io;
 	u8	power_mode;
 	void __iomem *sdio3_conf_reg;
+	void __iomem *mbus_win_regs;
 };
 
 /*
@@ -81,30 +82,16 @@ struct sdhci_pxa {
 #define SDIO3_CONF_CLK_INV	BIT(0)
 #define SDIO3_CONF_SD_FB_CLK	BIT(2)
 
-static int mv_conf_mbus_windows(struct platform_device *pdev,
+static int mv_conf_mbus_windows(struct device *dev, void __iomem *regs,
 				const struct mbus_dram_target_info *dram)
 {
 	int i;
-	void __iomem *regs;
-	struct resource *res;
 
 	if (!dram) {
-		dev_err(&pdev->dev, "no mbus dram info\n");
-		return -EINVAL;
-	}
-
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-	if (!res) {
-		dev_err(&pdev->dev, "cannot get mbus registers\n");
+		dev_err(dev, "no mbus dram info\n");
 		return -EINVAL;
 	}
 
-	regs = ioremap(res->start, resource_size(res));
-	if (!regs) {
-		dev_err(&pdev->dev, "cannot map mbus registers\n");
-		return -ENOMEM;
-	}
-
 	for (i = 0; i < SDHCI_MAX_WIN_NUM; i++) {
 		writel(0, regs + SDHCI_WINDOW_CTRL(i));
 		writel(0, regs + SDHCI_WINDOW_BASE(i));
@@ -122,8 +109,6 @@ static int mv_conf_mbus_windows(struct platform_device *pdev,
 		writel(cs->base, regs + SDHCI_WINDOW_BASE(i));
 	}
 
-	iounmap(regs);
-
 	return 0;
 }
 
@@ -135,6 +120,14 @@ static int armada_38x_quirks(struct platform_device *pdev,
 	struct sdhci_pxa *pxa = pltfm_host->priv;
 	struct resource *res;
 
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mbus");
+	pxa->mbus_win_regs = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(pxa->mbus_win_regs)) {
+		dev_err(mmc_dev(host->mmc),
+			"failed to obtain MBus windows register base\n");
+		return PTR_ERR(pxa->mbus_win_regs);
+	}
+
 	host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
 	host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
@@ -403,7 +396,8 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
 		ret = armada_38x_quirks(pdev, host);
 		if (ret < 0)
 			goto err_mbus_win;
-		ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
+		ret = mv_conf_mbus_windows(&pdev->dev, pxa->mbus_win_regs,
+					   mv_mbus_dram_info());
 		if (ret < 0)
 			goto err_mbus_win;
 	}
@@ -520,6 +514,13 @@ static int sdhci_pxav3_resume(struct device *dev)
 {
 	int ret;
 	struct sdhci_host *host = dev_get_drvdata(dev);
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+	struct sdhci_pxa *pxa = pltfm_host->priv;
+	struct device_node *np = dev->of_node;
+
+	if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))
+		ret = mv_conf_mbus_windows(dev, pxa->mbus_win_regs,
+					   mv_mbus_dram_info());
 
 	pm_runtime_get_sync(dev);
 	ret = sdhci_resume_host(host);
-- 
1.8.3.1

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#1240523 — Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC

FromGregory CLEMENT <gregory.clement@free-electrons.com>
Date2015-10-06 17:00 +0200
SubjectRe: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
Message-ID<qgBSH-PD-23@gated-at.bofh.it>
In reply to#1240098
Hi Marcin,
 
 On mar., oct. 06 2015, Marcin Wojtas <mw@semihalf.com> wrote:

> When resuming from suspend on Armada 38x SoC MBus windows have to be
> re-configured and for that purpose mv_conf_mbus_windows function needed
> rework. MBus windows register base address obtaining was moved to
> armada_38x_quirks function in order to be kept in pxa global structure,
> because it is used during a resume.
>
> This commit fixes resuming from suspend by calling MBus windows
> configuration routine and therefore enabling proper DMA operation.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  drivers/mmc/host/sdhci-pxav3.c | 39 ++++++++++++++++++++-------------------
>  1 file changed, 20 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index f5edf9d..3f71894 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -63,6 +63,7 @@ struct sdhci_pxa {
>  	struct clk *clk_io;
>  	u8	power_mode;
>  	void __iomem *sdio3_conf_reg;
> +	void __iomem *mbus_win_regs;
>  };


>  
> @@ -135,6 +120,14 @@ static int armada_38x_quirks(struct platform_device *pdev,
>  	struct sdhci_pxa *pxa = pltfm_host->priv;
>  	struct resource *res;
>  
> +	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mbus");
> +	pxa->mbus_win_regs = devm_ioremap_resource(&pdev->dev, res);

[...]

> @@ -520,6 +514,13 @@ static int sdhci_pxav3_resume(struct device *dev)
>  {
>  	int ret;
>  	struct sdhci_host *host = dev_get_drvdata(dev);
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct sdhci_pxa *pxa = pltfm_host->priv;
> +	struct device_node *np = dev->of_node;
> +
> +	if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))
> +		ret = mv_conf_mbus_windows(dev, pxa->mbus_win_regs,
> +					   mv_mbus_dram_info());

I would find it cleaner to not rely on the device tree outise the probe
function. What about just testing pxa->mbus_win_regs ? As it is set only
if we need it, it should be a good test.

Thanks,

Gregory


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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#1240532 — Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 17:10 +0200
SubjectRe: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
Message-ID<qgC2m-1gz-29@gated-at.bofh.it>
In reply to#1240523
Gregory,

2015-10-06 16:51 GMT+02:00 Gregory CLEMENT <gregory.clement
>> +     if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))
>> +             ret = mv_conf_mbus_windows(dev, pxa->mbus_win_regs,
>> +                                        mv_mbus_dram_info());
>
> I would find it cleaner to not rely on the device tree outise the probe
> function. What about just testing pxa->mbus_win_regs ? As it is set only
> if we need it, it should be a good test.
>

Sure, it will ease calling the function.

Thanks,
Marcin
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#1242981 — Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC

FromJisheng Zhang <jszhang@marvell.com>
Date2015-10-09 03:20 +0200
SubjectRe: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
Message-ID<qhuvM-3OT-3@gated-at.bofh.it>
In reply to#1240098
Hi Marcin,

On Tue, 6 Oct 2015 03:22:38 +0200
Marcin Wojtas <mw@semihalf.com> wrote:

> When resuming from suspend on Armada 38x SoC MBus windows have to be
> re-configured and for that purpose mv_conf_mbus_windows function needed
> rework. MBus windows register base address obtaining was moved to
> armada_38x_quirks function in order to be kept in pxa global structure,
> because it is used during a resume.
> 
> This commit fixes resuming from suspend by calling MBus windows
> configuration routine and therefore enabling proper DMA operation.
> 
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  drivers/mmc/host/sdhci-pxav3.c | 39 ++++++++++++++++++++-------------------
>  1 file changed, 20 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index f5edf9d..3f71894 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -63,6 +63,7 @@ struct sdhci_pxa {
>  	struct clk *clk_io;
>  	u8	power_mode;
>  	void __iomem *sdio3_conf_reg;
> +	void __iomem *mbus_win_regs;
>  };
>  
>  /*
> @@ -81,30 +82,16 @@ struct sdhci_pxa {
>  #define SDIO3_CONF_CLK_INV	BIT(0)
>  #define SDIO3_CONF_SD_FB_CLK	BIT(2)
>  
> -static int mv_conf_mbus_windows(struct platform_device *pdev,
> +static int mv_conf_mbus_windows(struct device *dev, void __iomem *regs,
>  				const struct mbus_dram_target_info *dram)
>  {
>  	int i;
> -	void __iomem *regs;
> -	struct resource *res;
>  
>  	if (!dram) {
> -		dev_err(&pdev->dev, "no mbus dram info\n");
> -		return -EINVAL;
> -	}
> -
> -	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> -	if (!res) {
> -		dev_err(&pdev->dev, "cannot get mbus registers\n");
> +		dev_err(dev, "no mbus dram info\n");
>  		return -EINVAL;
>  	}
>  
> -	regs = ioremap(res->start, resource_size(res));
> -	if (!regs) {
> -		dev_err(&pdev->dev, "cannot map mbus registers\n");
> -		return -ENOMEM;
> -	}
> -
>  	for (i = 0; i < SDHCI_MAX_WIN_NUM; i++) {
>  		writel(0, regs + SDHCI_WINDOW_CTRL(i));
>  		writel(0, regs + SDHCI_WINDOW_BASE(i));
> @@ -122,8 +109,6 @@ static int mv_conf_mbus_windows(struct platform_device *pdev,
>  		writel(cs->base, regs + SDHCI_WINDOW_BASE(i));
>  	}
>  
> -	iounmap(regs);
> -
>  	return 0;
>  }
>  
> @@ -135,6 +120,14 @@ static int armada_38x_quirks(struct platform_device *pdev,
>  	struct sdhci_pxa *pxa = pltfm_host->priv;
>  	struct resource *res;
>  
> +	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mbus");
> +	pxa->mbus_win_regs = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(pxa->mbus_win_regs)) {
> +		dev_err(mmc_dev(host->mmc),
> +			"failed to obtain MBus windows register base\n");

devm_ioremap_resource() has warned us if it fails, so is it better to remove
this dev_err() here?

> +		return PTR_ERR(pxa->mbus_win_regs);
> +	}
> +
>  	host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
>  	host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
>  	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> @@ -403,7 +396,8 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
>  		ret = armada_38x_quirks(pdev, host);
>  		if (ret < 0)
>  			goto err_mbus_win;
> -		ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
> +		ret = mv_conf_mbus_windows(&pdev->dev, pxa->mbus_win_regs,
> +					   mv_mbus_dram_info());
>  		if (ret < 0)
>  			goto err_mbus_win;
>  	}
> @@ -520,6 +514,13 @@ static int sdhci_pxav3_resume(struct device *dev)
>  {
>  	int ret;
>  	struct sdhci_host *host = dev_get_drvdata(dev);
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct sdhci_pxa *pxa = pltfm_host->priv;
> +	struct device_node *np = dev->of_node;
> +
> +	if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))

this would increase resume time especially those non armada-380-sdhci host
although it's trivial. Is it better to check "if (pxa->mbus_win_regs)"?

> +		ret = mv_conf_mbus_windows(dev, pxa->mbus_win_regs,
> +					   mv_mbus_dram_info());
>  
>  	pm_runtime_get_sync(dev);
>  	ret = sdhci_resume_host(host);

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#1243196 — Re: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-09 11:50 +0200
SubjectRe: [PATCH 4/8] mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
Message-ID<qhCtk-6Ne-21@gated-at.bofh.it>
In reply to#1242981
Hi Jisheng,


>> +     res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mbus");
>> +     pxa->mbus_win_regs = devm_ioremap_resource(&pdev->dev, res);
>> +     if (IS_ERR(pxa->mbus_win_regs)) {
>> +             dev_err(mmc_dev(host->mmc),
>> +                     "failed to obtain MBus windows register base\n");
>
> devm_ioremap_resource() has warned us if it fails, so is it better to remove
> this dev_err() here?
>

Indeed, I'll remove this excessive verbosity.

>>       struct sdhci_host *host = dev_get_drvdata(dev);
>> +     struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>> +     struct sdhci_pxa *pxa = pltfm_host->priv;
>> +     struct device_node *np = dev->of_node;
>> +
>> +     if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))
>
> this would increase resume time especially those non armada-380-sdhci host
> although it's trivial. Is it better to check "if (pxa->mbus_win_regs)"?
>

Already implemented in v2.

Thanks for the comments,
Marcin
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#1240099 — [PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards
Message-ID<qgp59-7Oq-17@gated-at.bofh.it>
In reply to#1240096
From: Nadav Haklai <nadavh@marvell.com>

According to 'FE-2946959' erratum the clock inversion option is
needed to support slow frequencies when the card input hold time
requirement is high. This setting is not required for high speed
MMC and might cause timing violation.

Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Cc: <stable@vger.kernel.org> # v4.2
---
 drivers/mmc/host/sdhci-pxav3.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 976cddd..89a9e49 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -291,6 +291,9 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
 		    uhs == MMC_TIMING_UHS_DDR50) {
 			reg_val &= ~SDIO3_CONF_CLK_INV;
 			reg_val |= SDIO3_CONF_SD_FB_CLK;
+		} else if (uhs == MMC_TIMING_MMC_HS) {
+			reg_val &= ~SDIO3_CONF_CLK_INV;
+			reg_val &= ~SDIO3_CONF_SD_FB_CLK;
 		} else {
 			reg_val |= SDIO3_CONF_CLK_INV;
 			reg_val &= ~SDIO3_CONF_SD_FB_CLK;
-- 
1.8.3.1

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#1240497 — Re: [PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards

FromGregory CLEMENT <gregory.clement@free-electrons.com>
Date2015-10-06 16:50 +0200
SubjectRe: [PATCH 2/8] mmc: sdhci-pxav3: disable clock inversion for HS MMC cards
Message-ID<qgBIZ-Em-3@gated-at.bofh.it>
In reply to#1240099
Hi Marcin,
 
 On mar., oct. 06 2015, Marcin Wojtas <mw@semihalf.com> wrote:

> From: Nadav Haklai <nadavh@marvell.com>
>
> According to 'FE-2946959' erratum the clock inversion option is
> needed to support slow frequencies when the card input hold time
> requirement is high. This setting is not required for high speed
> MMC and might cause timing violation.
>
> Signed-off-by: Nadav Haklai <nadavh@marvell.com>
> Cc: <stable@vger.kernel.org> # v4.2

Seems OK too.

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Thanks,

Gregory
> ---
>  drivers/mmc/host/sdhci-pxav3.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index 976cddd..89a9e49 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -291,6 +291,9 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
>  		    uhs == MMC_TIMING_UHS_DDR50) {
>  			reg_val &= ~SDIO3_CONF_CLK_INV;
>  			reg_val |= SDIO3_CONF_SD_FB_CLK;
> +		} else if (uhs == MMC_TIMING_MMC_HS) {
> +			reg_val &= ~SDIO3_CONF_CLK_INV;
> +			reg_val &= ~SDIO3_CONF_SD_FB_CLK;
>  		} else {
>  			reg_val |= SDIO3_CONF_CLK_INV;
>  			reg_val &= ~SDIO3_CONF_SD_FB_CLK;
> -- 
> 1.8.3.1
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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#1240100 — [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
Message-ID<qgp59-7Oq-21@gated-at.bofh.it>
In reply to#1240096
In case of armada_38x_quirks error, all clocks should be cleaned-up, same
as after mv_conf_mbus_windows failure.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Cc: <stable@vger.kernel.org> # v4.2
---
 drivers/mmc/host/sdhci-pxav3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 89a9e49..f5edf9d 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -402,7 +402,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
 	if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
 		ret = armada_38x_quirks(pdev, host);
 		if (ret < 0)
-			goto err_clk_get;
+			goto err_mbus_win;
 		ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
 		if (ret < 0)
 			goto err_mbus_win;
-- 
1.8.3.1

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#1240518 — Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks

FromGregory CLEMENT <gregory.clement@free-electrons.com>
Date2015-10-06 17:00 +0200
SubjectRe: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
Message-ID<qgBSG-PD-9@gated-at.bofh.it>
In reply to#1240100
Hi Marcin,
 
 On mar., oct. 06 2015, Marcin Wojtas <mw@semihalf.com> wrote:

> In case of armada_38x_quirks error, all clocks should be cleaned-up, same
> as after mv_conf_mbus_windows failure.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Cc: <stable@vger.kernel.org> # v4.2

Good catch.

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Thanks,

Gregory

> ---
>  drivers/mmc/host/sdhci-pxav3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index 89a9e49..f5edf9d 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -402,7 +402,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
>  	if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
>  		ret = armada_38x_quirks(pdev, host);
>  		if (ret < 0)
> -			goto err_clk_get;
> +			goto err_mbus_win;
>  		ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
>  		if (ret < 0)
>  			goto err_mbus_win;
> -- 
> 1.8.3.1
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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#1242637 — Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks

FromUlf Hansson <ulf.hansson@linaro.org>
Date2015-10-08 19:40 +0200
SubjectRe: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
Message-ID<qhnkC-1SL-15@gated-at.bofh.it>
In reply to#1240100
On 6 October 2015 at 03:22, Marcin Wojtas <mw@semihalf.com> wrote:
> In case of armada_38x_quirks error, all clocks should be cleaned-up, same
> as after mv_conf_mbus_windows failure.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Cc: <stable@vger.kernel.org> # v4.2

Thanks, applied for fixes!

Kind regards
Uffe

> ---
>  drivers/mmc/host/sdhci-pxav3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index 89a9e49..f5edf9d 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -402,7 +402,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
>         if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
>                 ret = armada_38x_quirks(pdev, host);
>                 if (ret < 0)
> -                       goto err_clk_get;
> +                       goto err_mbus_win;
>                 ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
>                 if (ret < 0)
>                         goto err_mbus_win;
> --
> 1.8.3.1
>
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#1242955 — Re: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-09 02:50 +0200
SubjectRe: [PATCH 3/8] mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
Message-ID<qhu2M-31O-61@gated-at.bofh.it>
In reply to#1242637
Thanks for grabbing the three patches!

Best regards,
Marcin

2015-10-08 19:35 GMT+02:00 Ulf Hansson <ulf.hansson@linaro.org>:
> On 6 October 2015 at 03:22, Marcin Wojtas <mw@semihalf.com> wrote:
>> In case of armada_38x_quirks error, all clocks should be cleaned-up, same
>> as after mv_conf_mbus_windows failure.
>>
>> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> Cc: <stable@vger.kernel.org> # v4.2
>
> Thanks, applied for fixes!
>
> Kind regards
> Uffe
>
>> ---
>>  drivers/mmc/host/sdhci-pxav3.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
>> index 89a9e49..f5edf9d 100644
>> --- a/drivers/mmc/host/sdhci-pxav3.c
>> +++ b/drivers/mmc/host/sdhci-pxav3.c
>> @@ -402,7 +402,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
>>         if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
>>                 ret = armada_38x_quirks(pdev, host);
>>                 if (ret < 0)
>> -                       goto err_clk_get;
>> +                       goto err_mbus_win;
>>                 ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
>>                 if (ret < 0)
>>                         goto err_mbus_win;
>> --
>> 1.8.3.1
>>
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#1240102 — [PATCH 8/8] mmc: sdhci-pxav3: enable modifying MMC_CARD bit during card initialization

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 8/8] mmc: sdhci-pxav3: enable modifying MMC_CARD bit during card initialization
Message-ID<qgp59-7Oq-25@gated-at.bofh.it>
In reply to#1240096
On Marvell Armada 38x SoC's the MMC_CARD bit in SD_CE_ATA_1 register must
be set to 0x1 when a MMC card is supposed to work in DDR mode, or when
commands CMD11, CMD14 and CMD20 are used.

This commit enables the above for all MMC cards by modifying the host
registers during card initialization. It is done by using init_card()
callback.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 drivers/mmc/host/sdhci-pxav3.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index ce96640..315dc4e 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -57,6 +57,7 @@
 
 #define SD_SPI_MODE          0x108
 #define SD_CE_ATA_1          0x10C
+#define SDCE_MMC_CARD		BIT(28)
 
 #define SD_CE_ATA_2          0x10E
 #define SDCE_MISC_INT		(1<<2)
@@ -221,6 +222,22 @@ static void pxav3_reset(struct sdhci_host *host, u8 mask)
 	}
 }
 
+static void pxav3_init_card(struct sdhci_host *host, struct mmc_card *card)
+{
+	struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
+	struct device_node *np = pdev->dev.of_node;
+	u32 reg_val;
+
+	if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
+		reg_val = sdhci_readl(host, SD_CE_ATA_1);
+		if (mmc_card_mmc(card))
+			reg_val |= SDCE_MMC_CARD;
+		else
+			reg_val &= ~SDCE_MMC_CARD;
+		sdhci_writel(host, reg_val, SD_CE_ATA_1);
+	}
+}
+
 #define MAX_WAIT_COUNT 5
 static void pxav3_gen_init_74_clocks(struct sdhci_host *host, u8 power_mode)
 {
@@ -338,6 +355,7 @@ static const struct sdhci_ops pxav3_sdhci_ops = {
 	.set_bus_width = sdhci_set_bus_width,
 	.reset = pxav3_reset,
 	.set_uhs_signaling = pxav3_set_uhs_signaling,
+	.init_card = pxav3_init_card,
 };
 
 static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
-- 
1.8.3.1

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#1240103 — [PATCH 7/8] mmc: sdhci: add init_card callback to sdhci

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 03:20 +0200
Subject[PATCH 7/8] mmc: sdhci: add init_card callback to sdhci
Message-ID<qgp59-7Oq-23@gated-at.bofh.it>
In reply to#1240096
Some sdhci hosts may require handling quirks during card initialization at
the time when its type is already known. Hence a new callback (init_card)
is added in sdhci_ops.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 drivers/mmc/host/sdhci.c | 9 +++++++++
 drivers/mmc/host/sdhci.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index cfed695..a1c308d 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2200,6 +2200,14 @@ static void sdhci_card_event(struct mmc_host *mmc)
 	spin_unlock_irqrestore(&host->lock, flags);
 }
 
+static void sdhci_init_card(struct mmc_host *mmc, struct mmc_card *card)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	if (host->ops->init_card)
+		host->ops->init_card(host, card);
+}
+
 static const struct mmc_host_ops sdhci_ops = {
 	.request	= sdhci_request,
 	.post_req	= sdhci_post_req,
@@ -2215,6 +2223,7 @@ static const struct mmc_host_ops sdhci_ops = {
 	.select_drive_strength		= sdhci_select_drive_strength,
 	.card_event			= sdhci_card_event,
 	.card_busy	= sdhci_card_busy,
+	.init_card	= sdhci_init_card,
 };
 
 /*****************************************************************************\
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index c751b78..365c860 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -547,6 +547,7 @@ struct sdhci_ops {
 					 struct mmc_card *card,
 					 unsigned int max_dtr, int host_drv,
 					 int card_drv, int *drv_type);
+	void	(*init_card)(struct sdhci_host *host, struct mmc_card *card);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-- 
1.8.3.1

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#1240516

FromGregory CLEMENT <gregory.clement@free-electrons.com>
Date2015-10-06 16:50 +0200
Message-ID<qgBJ1-Em-51@gated-at.bofh.it>
In reply to#1240096
Hi Marcin,
 
 On mar., oct. 06 2015, Marcin Wojtas <mw@semihalf.com> wrote:

> Hi,
>
> This series brings a couple of fixes and improvements to Armada 38x SDHCI
> controller driver. First four patches are fixes, of which three are stable
> CC'ed.
>
> Another two add DAT3-pin based hardware card detection in the driver, what
> should be used by the newest revisions of A388-GP boards.
>
> The last patches enable MMC_CARD bit, using init_card() callback added to
> SDHCI hosts.
>
> Any remarks and comments are welcome.

Thanks for this series, it looks good I have only one or two comments.

I also want to test it, how do you test the resume?
using standby or suspend to ram (by hacking the kernel as currently we
disbaled it) ?

Thanks,

Gregory

>
> Best regards,
> Marcin
>
> Marcin Wojtas (6):
>   mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
>   mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
>   mmc: sdhci-pxav3: enable usage of DAT3 pin as HW card detect
>   ARM: mvebu: enable SDHCI card detection using DAT3 pin on A388-GP
>   mmc: sdhci: add init_card callback to sdhci
>   mmc: sdhci-pxav3: enable modifying MMC_CARD bit during card
>     initialization
>
> Nadav Haklai (2):
>   mmc: sdhci-pxav3: remove broken clock base quirk for Armada 38x sdhci
>     driver
>   mmc: sdhci-pxav3: disable clock inversion for HS MMC cards
>
>  .../devicetree/bindings/mmc/sdhci-pxa.txt          |   5 +
>  arch/arm/boot/dts/armada-388-gp.dts                |   3 +-
>  drivers/mmc/host/sdhci-pxav3.c                     | 101 ++++++++++++++++-----
>  drivers/mmc/host/sdhci.c                           |  14 ++-
>  drivers/mmc/host/sdhci.h                           |   4 +
>  5 files changed, 102 insertions(+), 25 deletions(-)
>
> -- 
> 1.8.3.1
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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#1240608

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-06 17:50 +0200
Message-ID<qgCF4-20n-17@gated-at.bofh.it>
In reply to#1240516
Gregory,

>
> Thanks for this series, it looks good I have only one or two comments.
>
> I also want to test it, how do you test the resume?
> using standby or suspend to ram (by hacking the kernel as currently we
> disbaled it) ?
>

Standby works even without the patch, as the registers' contents do
not disappear. I added rejected s2ram support on top of 4.3-rc4 and
used it. Today however I changed my card to another one and got -110
error (timeout) - I have to re-check it. Anyway the patch is needed
for sure, because without MBUS window configuration any access to the
card ends up with a kernel hang.

Best regards,
Marcin
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#1242333

FromMarcin Wojtas <mw@semihalf.com>
Date2015-10-08 15:30 +0200
Message-ID<qhjqF-4LW-1@gated-at.bofh.it>
In reply to#1240608
Hi Gregory,

I have an update about s2ram status - after adding suspend/resume
support to pinctrl driver rootfs on SDHCI card survived suspend/resume
sequence without any problem (with broken-cd software polling, I also
have GP < v1.5).

Best regards,
Marcin

2015-10-06 17:48 GMT+02:00 Marcin Wojtas <mw@semihalf.com>:
> Gregory,
>
>>
>> Thanks for this series, it looks good I have only one or two comments.
>>
>> I also want to test it, how do you test the resume?
>> using standby or suspend to ram (by hacking the kernel as currently we
>> disbaled it) ?
>>
>
> Standby works even without the patch, as the registers' contents do
> not disappear. I added rejected s2ram support on top of 4.3-rc4 and
> used it. Today however I changed my card to another one and got -110
> error (timeout) - I have to re-check it. Anyway the patch is needed
> for sure, because without MBUS window configuration any access to the
> card ends up with a kernel hang.
>
> Best regards,
> Marcin
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