Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT

From	Bin Meng <bmeng.cn@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT
Date	2017-09-11 04:50 +0200
Message-ID	<uomXn-4P9-3@gated-at.bofh.it> (permalink)
References	<ukP1T-TX-3@gated-at.bofh.it> <ukP1W-TX-43@gated-at.bofh.it> <ukQU3-29D-27@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Hi Marek,

On Fri, Sep 1, 2017 at 5:52 PM, Marek Vasut <marek.vasut@gmail.com> wrote:
> On 09/01/2017 10:00 AM, Bin Meng wrote:
>> The number of protected range registers is not the same on BYT/LPT/
>> BXT. GPR0 only exists on Apollo Lake and its offset is reserved on
>> other platforms.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> Can this use regmap ? What you're implementing here seems like regmap to me.

No. regmap does not apply here.

Regards,
Bin

Thread

[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing  codes Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
  [PATCH 07/10] spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 08/10] spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 02/10] spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer  to erase Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
  [PATCH 09/10] spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 05/10] spi-nor: intel-spi: Use SW sequencer for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range  registers for BYT/LPT Marek Vasut <marek.vasut@gmail.com> - 2017-09-01 12:00 +0200
      Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range  registers for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-11 04:50 +0200
  Re: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:10 +0200

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