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[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements

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This series does several bug fixes and clean ups against the intel-spi
spi-nor driver, as well as enhancements to make the driver independent
on the underlying BIOS/bootloader.

At present the driver uses the HW sequencer for the read/write/erase on
all supported platforms, read_reg/write_reg for BXT, and the SW sequencer
for read_reg/write_reg for BYT/LPT. The way the driver uses the HW and SW
sequencer relies on some programmed register settings and hence creates
unneeded dependencies with the underlying BIOS/bootloader. For example,
the driver unfortunately does not work as expected when booting from
Intel Baytrail FSP based bootloaders like U-Boot, as the Baytrail FSP
does not set up some SPI controller settings to make the driver happy.
Now such limitation has been removed with this series.


Bin Meng (10):
  spi-nor: intel-spi: Fix number of protected range registers for
    BYT/LPT
  spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle
  spi-nor: intel-spi: Fix broken software sequencing codes
  spi-nor: intel-spi: Check transfer length in the HW/SW cycle
  spi-nor: intel-spi: Use SW sequencer for BYT/LPT
  spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in
    intel_spi_write()
  spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS
  spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW
  spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi'
  spi-nor: intel-spi: Fall back to use SW sequencer to erase

 drivers/mtd/spi-nor/intel-spi.c | 209 +++++++++++++++++++++++++++++-----------
 1 file changed, 151 insertions(+), 58 deletions(-)

-- 
2.9.2

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[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing  codes Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
  [PATCH 07/10] spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 08/10] spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 02/10] spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer  to erase Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
  [PATCH 09/10] spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 05/10] spi-nor: intel-spi: Use SW sequencer for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
  [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
    Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range  registers for BYT/LPT Marek Vasut <marek.vasut@gmail.com> - 2017-09-01 12:00 +0200
  Re: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:10 +0200

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