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Groups > linux.kernel > #1724858
| From | Bin Meng <bmeng.cn@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() |
| Date | 2017-09-01 10:00 +0200 |
| Message-ID | <ukP1W-TX-39@gated-at.bofh.it> (permalink) |
| References | <ukP1T-TX-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
So far intel_spi_write() uses the HW sequencer to do the write. But the HW sequencer register HSFSTS_CTL does not have such a field for 'Atomic Cycle Sequence', remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- drivers/mtd/spi-nor/intel-spi.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index d0237fe..757b9f1 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -572,11 +572,6 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE; val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT; val |= HSFSTS_CTL_FCYCLE_WRITE; - - /* Write enable */ - if (ispi->preopcodes[1] == SPINOR_OP_WREN) - val |= SSFSTS_CTL_SPOP; - val |= SSFSTS_CTL_ACS; writel(val, ispi->base + HSFSTS_CTL); ret = intel_spi_write_block(ispi, write_buf, block_size); -- 2.9.2
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[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
[PATCH 07/10] spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 08/10] spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 02/10] spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
[PATCH 09/10] spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 05/10] spi-nor: intel-spi: Use SW sequencer for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Marek Vasut <marek.vasut@gmail.com> - 2017-09-01 12:00 +0200
Re: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:10 +0200
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