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Groups > linux.kernel > #1724848
| From | Bin Meng <bmeng.cn@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes |
| Date | 2017-09-01 10:00 +0200 |
| Message-ID | <ukP1U-TX-13@gated-at.bofh.it> (permalink) |
| References | <ukP1T-TX-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
There are two bugs in current intel_spi_sw_cycle(): - The 'data byte count' field should be the number of bytes transferred minus 1 - SSFSTS_CTL is the offset from ispi->sregs, not ispi->base Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- drivers/mtd/spi-nor/intel-spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index 07626ca..263c6ab 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -426,7 +426,7 @@ static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, int len) if (ret < 0) return ret; - val = (len << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS; + val = ((len - 1) << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS; val |= ret << SSFSTS_CTL_COP_SHIFT; val |= SSFSTS_CTL_FCERR | SSFSTS_CTL_FDONE; val |= SSFSTS_CTL_SCGO; @@ -436,7 +436,7 @@ static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, int len) if (ret) return ret; - status = readl(ispi->base + SSFSTS_CTL); + status = readl(ispi->sregs + SSFSTS_CTL); if (status & SSFSTS_CTL_FCERR) return -EIO; else if (status & SSFSTS_CTL_AEL) -- 2.9.2
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[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 03/10] spi-nor: intel-spi: Fix broken software sequencing codes Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
[PATCH 07/10] spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 08/10] spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 02/10] spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:00 +0200
[PATCH 09/10] spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 05/10] spi-nor: intel-spi: Use SW sequencer for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
[PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Bin Meng <bmeng.cn@gmail.com> - 2017-09-01 10:00 +0200
Re: [PATCH 01/10] spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT Marek Vasut <marek.vasut@gmail.com> - 2017-09-01 12:00 +0200
Re: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-09-01 12:10 +0200
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