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| From | Daniel Lezcano <daniel.lezcano@linaro.org> |
| Newsgroups | linux.kernel |
| Subject | [PATCH 27/29] clocksource: Augment bindings for Faraday timer |
| Date | Sun, 16 Apr 2017 22:30:03 +0200 |
| Message-ID | <twYY3-87V-37@gated-at.bofh.it> (permalink) |
| References | <twYY1-87V-3@gated-at.bofh.it> <twYY1-87V-5@gated-at.bofh.it> |
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| X-Original-Cc | linux-kernel@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) |
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From: Linus Walleij <linus.walleij@linaro.org>
It turns out that the Cortina Gemini timer block is just a
standard IP block from Faraday Technology named FTTMR010.
In order to make things clear and understandable, we rename the
bindings with a Faraday compatible as primary and the Cortina
gemini as a more specific case.
For the plain Faraday timer we require two clock references,
while the Gemini can keep it's syscon lookup pattern.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/timer/cortina,gemini-timer.txt | 22 ---------------
.../devicetree/bindings/timer/faraday,fttmr010.txt | 33 ++++++++++++++++++++++
2 files changed, 33 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/cortina,gemini-timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
diff --git a/Documentation/devicetree/bindings/timer/cortina,gemini-timer.txt b/Documentation/devicetree/bindings/timer/cortina,gemini-timer.txt
deleted file mode 100644
index 16ea1d3..0000000
--- a/Documentation/devicetree/bindings/timer/cortina,gemini-timer.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Cortina Systems Gemini timer
-
-This timer is embedded in the Cortina Systems Gemini SoCs.
-
-Required properties:
-
-- compatible : Must be "cortina,gemini-timer"
-- reg : Should contain registers location and length
-- interrupts : Should contain the three timer interrupts with
- flags for rising edge
-- syscon : a phandle to the global Gemini system controller
-
-Example:
-
-timer@43000000 {
- compatible = "cortina,gemini-timer";
- reg = <0x43000000 0x1000>;
- interrupts = <14 IRQ_TYPE_EDGE_RISING>, /* Timer 1 */
- <15 IRQ_TYPE_EDGE_RISING>, /* Timer 2 */
- <16 IRQ_TYPE_EDGE_RISING>; /* Timer 3 */
- syscon = <&syscon>;
-};
diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
new file mode 100644
index 0000000..b73ca6c
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
@@ -0,0 +1,33 @@
+Faraday Technology timer
+
+This timer is a generic IP block from Faraday Technology, embedded in the
+Cortina Systems Gemini SoCs and other designs.
+
+Required properties:
+
+- compatible : Must be one of
+ "faraday,fttmr010"
+ "cortina,gemini-timer"
+- reg : Should contain registers location and length
+- interrupts : Should contain the three timer interrupts usually with
+ flags for falling edge
+
+Optionally required properties:
+
+- clocks : a clock to provide the tick rate for "faraday,fttmr010"
+- clock-names : should be "EXTCLK" and "PCLK" for the external tick timer
+ and peripheral clock respectively, for "faraday,fttmr010"
+- syscon : a phandle to the global Gemini system controller if the compatible
+ type is "cortina,gemini-timer"
+
+Example:
+
+timer@43000000 {
+ compatible = "faraday,fttmr010";
+ reg = <0x43000000 0x1000>;
+ interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
+ <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
+ <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
+ clocks = <&extclk>, <&pclk>;
+ clock-names = "EXTCLK", "PCLK";
+};
--
2.7.4
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[GIT PULL] timers changes for 4.12 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
Re: [PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Rob Herring <robh@kernel.org> - 2017-04-20 16:20 +0200
[PATCH 07/29] arm64: arch_timer: Add erratum handler for CPU-specific capability Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 29/29] clocksource/drivers/fttmr010: Refactor to handle clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 11/29] arm64: arch_timer: Make workaround methods optional Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 04/29] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 13/29] arm64: arch_timer: Move clocksource_counter and co around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 27/29] clocksource: Augment bindings for Faraday timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 01/29] arm64: Allow checking of a CPU-local erratum Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 23/29] ARM: dts: rockchip: Update compatible property for rk322x timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 05/29] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 02/29] arm64: Add CNTVCT_EL0 trap handler Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 17/29] arm64: arch_timer: Allow erratum matching with ACPI OEM information Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 08/29] arm64: arch_timer: Move arch_timer_reg_read/write around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 03/29] arm64: Define Cortex-A73 MIDR Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 26/29] ARM: dts: rockchip: disable arm-global-timer for rk3188 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 25/29] ARM: dts: rockchip: Add timer entries to rk3188 SoC Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 09/29] arm64: arch_timer: Get rid of erratum_workaround_set_sne Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 21/29] clocksource: Add missing line break to error messages Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
Re: [PATCH 21/29] clocksource: Add missing line break to error messages Uwe Kleine-König <u.kleine-koenig@pengutronix.de> - 2017-04-24 09:50 +0200
[PATCH 19/29] clocksource/drivers/orion: Read clock rate once Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
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