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Groups > linux.kernel > #1624451
| From | Daniel Lezcano <daniel.lezcano@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds |
| Date | 2017-04-16 22:40 +0200 |
| Message-ID | <twZ7I-8bh-21@gated-at.bofh.it> (permalink) |
| References | <twYY1-87V-3@gated-at.bofh.it> <twYY1-87V-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Marc Zyngier <marc.zyngier@arm.com>
The way we work around errata affecting set_next_event is not very
nice, at it imposes this workaround on errata that do not need it.
Add new workaround hooks and let the existing workarounds use them.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/include/asm/arch_timer.h | 4 ++++
drivers/clocksource/arm_arch_timer.c | 31 ++++++++++++++++++++++++++-----
2 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 1b0d7e9..cc1e081 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -42,6 +42,8 @@ enum arch_timer_erratum_match_type {
ate_match_local_cap_id,
};
+struct clock_event_device;
+
struct arch_timer_erratum_workaround {
enum arch_timer_erratum_match_type match_type;
const void *id;
@@ -49,6 +51,8 @@ struct arch_timer_erratum_workaround {
u32 (*read_cntp_tval_el0)(void);
u32 (*read_cntv_tval_el0)(void);
u64 (*read_cntvct_el0)(void);
+ int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
+ int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
};
extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 2c02e25..a0c9ee8 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -282,6 +282,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
#ifdef CONFIG_HISILICON_ERRATUM_161010101
@@ -292,6 +294,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
},
#endif
};
@@ -377,11 +381,24 @@ static void arch_timer_check_ool_workaround(enum arch_timer_erratum_match_type t
local ? "local" : "global", wa->desc);
}
+#define erratum_handler(fn, r, ...) \
+({ \
+ bool __val; \
+ if (needs_unstable_timer_counter_workaround() && \
+ timer_unstable_counter_workaround->fn) { \
+ r = timer_unstable_counter_workaround->fn(__VA_ARGS__); \
+ __val = true; \
+ } else { \
+ __val = false; \
+ } \
+ __val; \
+})
+
#else
#define arch_timer_check_ool_workaround(t,a) do { } while(0)
#define erratum_set_next_event_tval_virt(...) ({BUG(); 0;})
#define erratum_set_next_event_tval_phys(...) ({BUG(); 0;})
-#define needs_unstable_timer_counter_workaround() ({false;})
+#define erratum_handler(fn, r, ...) ({false;})
#endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */
static __always_inline irqreturn_t timer_handler(const int access,
@@ -474,8 +491,10 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
static int arch_timer_set_next_event_virt(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_virt(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_virt, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
return 0;
@@ -484,8 +503,10 @@ static int arch_timer_set_next_event_virt(unsigned long evt,
static int arch_timer_set_next_event_phys(unsigned long evt,
struct clock_event_device *clk)
{
- if (needs_unstable_timer_counter_workaround())
- return erratum_set_next_event_tval_phys(evt, clk);
+ int ret;
+
+ if (erratum_handler(set_next_event_phys, ret, evt, clk))
+ return ret;
set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
return 0;
--
2.7.4
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[GIT PULL] timers changes for 4.12 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
Re: [PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Rob Herring <robh@kernel.org> - 2017-04-20 16:20 +0200
[PATCH 07/29] arm64: arch_timer: Add erratum handler for CPU-specific capability Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 29/29] clocksource/drivers/fttmr010: Refactor to handle clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 11/29] arm64: arch_timer: Make workaround methods optional Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 04/29] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 13/29] arm64: arch_timer: Move clocksource_counter and co around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 27/29] clocksource: Augment bindings for Faraday timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 01/29] arm64: Allow checking of a CPU-local erratum Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 23/29] ARM: dts: rockchip: Update compatible property for rk322x timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
[PATCH 05/29] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 02/29] arm64: Add CNTVCT_EL0 trap handler Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 17/29] arm64: arch_timer: Allow erratum matching with ACPI OEM information Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 08/29] arm64: arch_timer: Move arch_timer_reg_read/write around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 03/29] arm64: Define Cortex-A73 MIDR Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 26/29] ARM: dts: rockchip: disable arm-global-timer for rk3188 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 25/29] ARM: dts: rockchip: Add timer entries to rk3188 SoC Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 09/29] arm64: arch_timer: Get rid of erratum_workaround_set_sne Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
[PATCH 21/29] clocksource: Add missing line break to error messages Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
Re: [PATCH 21/29] clocksource: Add missing line break to error messages Uwe Kleine-König <u.kleine-koenig@pengutronix.de> - 2017-04-24 09:50 +0200
[PATCH 19/29] clocksource/drivers/orion: Read clock rate once Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
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