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Groups > linux.kernel > #1624434

[PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data

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From: Marc Zyngier <marc.zyngier@arm.com>

In order to deal with ACPI enabled platforms suffering from the
HISILICON_ERRATUM_161010101, let's add the required OEM data that
allow the workaround to be enabled.

Acked-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: dann frazier <dann.frazier@canonical.com>
Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/clocksource/arm_arch_timer.c | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 887f6d0..bf9e9d7 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -270,6 +270,29 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
 {
 	return __hisi_161010101_read_reg(cntvct_el0);
 }
+
+static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {
+	/*
+	 * Note that trailing spaces are required to properly match
+	 * the OEM table information.
+	 */
+	{
+		.oem_id		= "HISI  ",
+		.oem_table_id	= "HIP05   ",
+		.oem_revision	= 0,
+	},
+	{
+		.oem_id		= "HISI  ",
+		.oem_table_id	= "HIP06   ",
+		.oem_revision	= 0,
+	},
+	{
+		.oem_id		= "HISI  ",
+		.oem_table_id	= "HIP07   ",
+		.oem_revision	= 0,
+	},
+	{ /* Sentinel indicating the end of the OEM array */ },
+};
 #endif
 
 #ifdef CONFIG_ARM64_ERRATUM_858921
@@ -347,6 +370,16 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
 		.set_next_event_phys = erratum_set_next_event_tval_phys,
 		.set_next_event_virt = erratum_set_next_event_tval_virt,
 	},
+	{
+		.match_type = ate_match_acpi_oem_info,
+		.id = hisi_161010101_oem_info,
+		.desc = "HiSilicon erratum 161010101",
+		.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
+		.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
+		.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+		.set_next_event_phys = erratum_set_next_event_tval_phys,
+		.set_next_event_virt = erratum_set_next_event_tval_virt,
+	},
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_858921
 	{
-- 
2.7.4

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[GIT PULL] timers changes for 4.12 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 18/29] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 22/29] dt-bindings: Clarify compatible property for rockchip timers Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
    Re: [PATCH 22/29] dt-bindings: Clarify compatible property for  rockchip timers Rob Herring <robh@kernel.org> - 2017-04-20 16:20 +0200
  [PATCH 07/29] arm64: arch_timer: Add erratum handler for CPU-specific capability Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 29/29] clocksource/drivers/fttmr010: Refactor to handle clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 11/29] arm64: arch_timer: Make workaround methods optional Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 04/29] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 13/29] arm64: arch_timer: Move clocksource_counter and co around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 27/29] clocksource: Augment bindings for Faraday timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
  [PATCH 01/29] arm64: Allow checking of a CPU-local erratum Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
    [PATCH 23/29] ARM: dts: rockchip: Update compatible property for rk322x timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:30 +0200
    [PATCH 05/29] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 02/29] arm64: Add CNTVCT_EL0 trap handler Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 17/29] arm64: arch_timer: Allow erratum matching with ACPI OEM information Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 08/29] arm64: arch_timer: Move arch_timer_reg_read/write around Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 15/29] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 03/29] arm64: Define Cortex-A73 MIDR Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 10/29] arm64: arch_timer: Rework the set_next_event workarounds Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 26/29] ARM: dts: rockchip: disable arm-global-timer for rk3188 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 25/29] ARM: dts: rockchip: Add timer entries to rk3188 SoC Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 09/29] arm64: arch_timer: Get rid of erratum_workaround_set_sne Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
    [PATCH 21/29] clocksource: Add missing line break to error messages Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200
      Re: [PATCH 21/29] clocksource: Add missing line break to error  messages Uwe Kleine-König          <u.kleine-koenig@pengutronix.de> - 2017-04-24 09:50 +0200
    [PATCH 19/29] clocksource/drivers/orion: Read clock rate once Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-04-16 22:40 +0200

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