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[PATCH v4 4/9] arm64: cpufeature: Document the rules of safe value for features

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Document the rules for choosing the safe value for different types
of features.

Cc: Dave Martin <dave.martin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes since v3:
 - Reworded the comment
---
 arch/arm64/include/asm/cpufeature.h | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index b4989df..10d5624 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -29,7 +29,20 @@
 #include <linux/jump_label.h>
 #include <linux/kernel.h>
 
-/* CPU feature register tracking */
+/*
+ * CPU feature register tracking
+ *
+ * The safe value of a CPUID feature field is dependent on the implications
+ * of the values assigned to it by the architecture. Based on the relationship
+ * between the values, the features are classified into 3 types - LOWER_SAFE,
+ * HIGHER_SAFE and EXACT.
+ *
+ * The lowest value of all the CPUs is chosen for LOWER_SAFE and highest
+ * for HIGHER_SAFE. It is expected that all CPUs have the same value for
+ * a field when EXACT is specified, failing which, the safe value specified
+ * in the table is chosen.
+ */
+
 enum ftr_type {
 	FTR_EXACT,	/* Use a predefined safe value */
 	FTR_LOWER_SAFE,	/* Smaller value is safe */
-- 
2.7.4

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[PATCH v4 0/9] arm64: Expose CPUID registers via emulation Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  [PATCH v4 4/9] arm64: cpufeature: Document the rules of safe value for features Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  [PATCH v4 9/9] arm64: Documentation - Expose CPU feature registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  [PATCH v4 1/9] arm64: cpufeature: treat unknown fields as RES0 Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  [PATCH v4 3/9] arm64: cpufeature: Cleanup feature bit tables Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
    Re: [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Catalin Marinas <catalin.marinas@arm.com> - 2017-01-10 15:30 +0100
      Re: [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-01-10 15:30 +0100
  [PATCH v4 6/9] arm64: Add helper to decode register from instruction Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
  Re: [PATCH v4 0/9] arm64: Expose CPUID registers via emulation Will Deacon <will.deacon@arm.com> - 2017-01-10 18:20 +0100

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