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Groups > linux.kernel > #1555449
| From | Suzuki K Poulose <Suzuki.Poulose@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v4 7/9] arm64: cpufeature: Track user visible fields |
| Date | 2017-01-10 15:30 +0100 |
| Message-ID | <sY5B0-2so-23@gated-at.bofh.it> (permalink) |
| References | <sXM5j-77I-11@gated-at.bofh.it> <sXM5j-77I-19@gated-at.bofh.it> <sY5B0-2so-21@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 10/01/17 14:24, Catalin Marinas wrote:
> On Mon, Jan 09, 2017 at 05:28:30PM +0000, Suzuki K. Poulose wrote:
>> Changes since V3:
>> - Mark ID_AA64ISAR0_EL1:RDM visible
> [...]
>> static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA1_SHIFT, 4, 0),
>> - ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
>> + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
>
> As I said in an earlier reply, I'd like the RDM exposing to come
> together with a patch presenting the corresponding HWCAP bit. But it's
> fine by me if you add the HWCAP separately from this patch, in which
> case my ack still stands.
Catalin,
Yes, I have a separate patch for that.
Thanks
Suzuki
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[PATCH v4 0/9] arm64: Expose CPUID registers via emulation Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
[PATCH v4 4/9] arm64: cpufeature: Document the rules of safe value for features Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
[PATCH v4 9/9] arm64: Documentation - Expose CPU feature registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
[PATCH v4 1/9] arm64: cpufeature: treat unknown fields as RES0 Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
[PATCH v4 3/9] arm64: cpufeature: Cleanup feature bit tables Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
[PATCH v4 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
Re: [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Catalin Marinas <catalin.marinas@arm.com> - 2017-01-10 15:30 +0100
Re: [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-01-10 15:30 +0100
[PATCH v4 6/9] arm64: Add helper to decode register from instruction Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-09 18:40 +0100
Re: [PATCH v4 0/9] arm64: Expose CPUID registers via emulation Will Deacon <will.deacon@arm.com> - 2017-01-10 18:20 +0100
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