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Groups > linux.kernel > #1517666
| From | Stephen Boyd <sboyd@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v15 2/4] reset: mediatek: Add MT2701 reset driver |
| Date | 2016-11-09 01:10 +0100 |
| Message-ID | <sBoCJ-8eR-9@gated-at.bofh.it> (permalink) |
| References | <szHq9-79q-7@gated-at.bofh.it> <szHq9-79q-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 11/04, Erin Lo wrote: > From: Shunli Wang <shunli.wang@mediatek.com> > > In infrasys and perifsys, there are many reset > control bits for kinds of modules. These bits are > used as actual reset controllers to be registered > into kernel's generic reset controller framework. > > Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> > Signed-off-by: James Liao <jamesjj.liao@mediatek.com> > Signed-off-by: Erin Lo <erin.lo@mediatek.com> > Tested-by: John Crispin <blogic@openwrt.org> > Acked-by: Philipp Zabel <p.zabel@pengutronix.de> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
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[PATCH v15 0/4] Add clock support for Mediatek MT2701 Erin Lo <erin.lo@mediatek.com> - 2016-11-04 08:50 +0100
[PATCH v15 2/4] reset: mediatek: Add MT2701 reset driver Erin Lo <erin.lo@mediatek.com> - 2016-11-04 08:50 +0100
Re: [PATCH v15 2/4] reset: mediatek: Add MT2701 reset driver Stephen Boyd <sboyd@codeaurora.org> - 2016-11-09 01:10 +0100
[PATCH v15 4/4] arm: dts: mt2701: Use real clock for UARTs Erin Lo <erin.lo@mediatek.com> - 2016-11-04 08:50 +0100
Re: [PATCH v15 4/4] arm: dts: mt2701: Use real clock for UARTs Matthias Brugger <matthias.bgg@gmail.com> - 2016-11-09 18:30 +0100
[PATCH v15 3/4] arm: dts: mt2701: Add clock controller device nodes Erin Lo <erin.lo@mediatek.com> - 2016-11-04 08:50 +0100
Re: [PATCH v15 1/4] clk: mediatek: Add MT2701 clock support Stephen Boyd <sboyd@codeaurora.org> - 2016-11-09 01:10 +0100
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