Re: Forth in VHDL

From	Jan Coombs <jenfhaomndgfwutc@murmic.plus.com>
Newsgroups	comp.lang.forth
Subject	Re: Forth in VHDL
Date	2016-07-28 09:12 +0100
Organization	A noiseless patient Spider
Message-ID	<20160728091213.3d456f64@HP-6550b> (permalink)
References	(5 earlier) <nn468n$3k2$1@dont-email.me> <nn47lq$6r4$1@dont-email.me> <nn5o8m$6v0$1@dont-email.me> <20160726110441.73da10eb@HP-6550b> <d717def8-76e3-4958-8eef-03a9e3863d38@googlegroups.com>

Show all headers | View raw

On Tue, 26 Jul 2016 09:43:31 -0700 (PDT)
JUERGEN <epldfpga@aol.com> wrote:

> Jan, you can implement asynch logic in any FPGA. 

Yes, of course, with a clock faster than the maximum data
propagation rate.  From this could I get anything better than a
slow and power-hungry simulation?

>       Just read the NCL articles see
> http://link.springer.com/article/10.1007/s10836-008-5083-1 and
 - pay barrier GBP 29.95

> http://www.theseusresearch.com/NCLPaper01.htm.
 - link to pdf broken, perhaps there is a copy somewhere else? 

>                                                It just depends
> if the extra effort is required or synchronous is good enough.

Achronix claimed a 10x reduction of the power/speed factor for
their asynchronous FPGAs, although these are now 'on the back
burner'. [1]

Jan Coombs
-- 
[1] http://eejournal.com/archives/articles/20150218-achronix/

Thread

Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 22:29 -0400
  Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:01 -0400
    Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:05 -0400
      Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 22:25 -0500
        Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 00:08 -0400
          Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 23:57 -0500
            Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:22 -0400
              Re: Forth in VHDL Paul Rubin <no.email@nospam.invalid> - 2016-07-24 22:38 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:53 -0400
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:31 -0700
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:36 -0700
                Re: Forth in VHDL Richard Owlett <rowlett@cloud85.net> - 2016-07-25 08:14 -0500
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 07:37 -0700
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 08:01 -0700
              Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 14:11 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 17:39 -0400
                Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 18:01 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 19:40 -0400
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-26 11:04 +0100
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 11:13 -0400
                Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-26 16:00 +0000
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 12:58 -0400
                Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-27 09:39 +0000
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 10:01 -0400
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-27 22:46 +0100
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-26 09:43 -0700
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-28 09:12 +0100
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 05:04 -0400
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-28 07:56 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 13:04 -0400
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-08-02 12:21 +0100
                Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-28 08:02 -0700
    Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 18:15 -0400
      Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-28 15:19 -0700
        Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-31 18:43 -0400
          Re: Forth in VHDL Paul Rubin <no.email@nospam.invalid> - 2016-07-31 17:10 -0700
  Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-24 20:08 -0700
    Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-24 20:33 -0700
      Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 22:58 -0500
        Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 00:17 -0400
          Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 10:02 -0700
            Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 14:13 -0400
              Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 14:17 -0400
              Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 15:04 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 19:28 -0400
                Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 17:20 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 23:07 -0400
                Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-26 03:07 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 13:05 -0400
                Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-26 16:22 -0700
                Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 03:57 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 10:34 -0400
                Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 11:15 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 12:51 -0400
                Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 16:12 -0500
                Re: Forth in VHDL "Elizabeth D. Rather" <erather@forth.com> - 2016-07-27 12:43 -1000
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 00:40 -0400
                Re: Forth in VHDL hughaguilar96@gmail.com - 2016-08-02 22:45 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 00:39 -0400
  Re: Forth in VHDL wzab01@gmail.com - 2016-07-25 01:48 -0700
  Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:57 -0700
    Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 06:02 -0700
    Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-30 16:40 +0100
      Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-08-01 08:58 -0700
    Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-31 17:10 -0400
      Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-08-01 09:02 -0700
  Re: Forth in VHDL Ilya Tarasov <ilya74.tarasov@gmail.com> - 2016-07-29 05:42 -0700

csiph-web