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Re: Forth in VHDL

Cross-posted to 2 groups.

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On 7/24/2016 11:08 PM, rickman wrote:
> On 7/24/2016 11:25 PM, Cecil Bayona wrote:
>> On 7/24/2016 10:05 PM, rickman wrote:

>> Are you still recovering?
>
> Recovery is going pretty well, thanks for asking.  I have regained most
> of the muscle strength lost from limping very abnormally for some years.
>  I still have swelling in the operated leg but no one is very concerned
> and it seems to be better the last week or so.  They did an ultrasound
> to rule out DVT so it should just be some more time.
>
> The funny part is that my work no longer requires much of me other than
> pushing paper and staying on top of things.  I accept orders for
> hardware I sell and place the orders with my fabrication house.  When
> they complete testing and ship the boards I send the invoice to the
> customer and pay the fab house.  Lots of profit with very little work.
> In fact, technically I was working during my surgery (waiting for boards
> to be fabbed).  That's the main reason why I have free time.
>
Good to hear you are doing better, it might take a while of therapy and 
exercises until you are closer to being your old self physically.

Myself tomorrow I will go to the doctor in the morning to figure out 
what to try next, I'm not responding to very expensive medicine so I 
might have to take desperate measures to bring my health under control.

>
> As to a "directly executing" Forth CPU, what would that be exactly?
> Hardware is hardware.  To design it requires forming an idea of the
> hardware.  The only hardware I have thought of to execute Forth would be
> the same sort of stack machines I've seen many times and designed
> myself.  Not much new there.  What would a "native" Forth machine look
> like other than a dual stack CPU which is what the Forth virtual machine
> is?
>
I've seen CPUs made from asynchronous random logic rather your typical 
synchronous logic like almost all standard CPUs, they tend to be a 
little faster but a nightmare to debug. You would still have the 
registers but most of the logic would be random logic versus nice state 
machines and everything running off a master clock. Not any major 
advantages other than being a little bit faster but lots of 
disadvantages, timing is a nightmare, so is debugging it.

No enough gains to justify the problems so I stick to nice synchronous 
logic, one is better off with CPUs like the ep32, five packed 
instructions to a 32 bit word, TOS an NOS on registers, single clock 
execution of instructions, a nice machine, another nice one is the J1 
capable of multiple instruction execution in one clock.


-- 
Cecil - k5nwa

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Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 22:29 -0400
  Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:01 -0400
    Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:05 -0400
      Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 22:25 -0500
        Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 00:08 -0400
          Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 23:57 -0500
            Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:22 -0400
              Re: Forth in VHDL Paul Rubin <no.email@nospam.invalid> - 2016-07-24 22:38 -0700
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:53 -0400
              Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 14:11 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 17:39 -0400
                Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 18:01 -0500
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 19:40 -0400
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-26 11:04 +0100
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 11:13 -0400
                Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-26 16:00 +0000
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 12:58 -0400
                Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-27 09:39 +0000
                Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 10:01 -0400
                Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-27 22:46 +0100
    Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 18:15 -0400

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