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Re: indexing register

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On 8/24/11 12:36 PM, Joe Keane wrote:
> This is bouncing around my head.
>
> Say we have a machine with a lot of general registers, at least 1024 and
> possibly much more.  [There's some VLIWy stuff, but i think it's
> irrelevant, so pretend i tell you it's a standard RISCy machine.]
>
> We add a register BL (base latch).
>
> Every op that get/put a register has a bit called 'index'.  If off, the
> register number is in the op; if on, we add that to BL to get the correct
> register number.  Now we can cheat a bit on the register field; maybe
> the machine has 16384 registers, but we can only access 512 without
> changing BL.

AMD29k did this. Most instructions were of the form

	C = A op B

Where A, B & C were each 1 bit (same as your index) + 7 bit reg #. If the
top bit was off, you directly accessed reg1..reg127 from the register file.
If it was on, you add the 7 bit reg# to reg1 and used the lowest 7 bits
to index the other 128 registers from the 256 register file. So reg1 (called
gr1) was the same as your BL but only for 128 registers.

reg# 0 was special. Depending on whether it was in the A, B or C field, you
picked up the real reg# from `special' registers IPA, IPB or IPC and accessed
that.

> It's unclear whether access to BL is a KISS movtcr/movfcr, or we should
> have some ops like save/restore.  It is tempting, we can put an adder
> next to BL and he won't need to bother anyone.  In either case we also
> want a compare with some bound; if out of whack, do something-or-other.

This limit checking was done on function entry or exit. If the function
wanted N registers and the file has < N, you took a trap, saved some
register contents to memory and returned. Similar on function exit (if
the caller's registers were in memory, you took a trap and restored them).

> Basically register windows, but each op can choose to index or not.
>
> Really, there's BL1 and BL2, and of course some way to switch between
> them.  [Oh and you can't use it in the next instruction, the rule for
> everything.]  Presumably it's not useful to let each op select.  Or
> maybe three (ABL/FBL/SBL stolen from the VAX).

gr1 was used as a stack ptr and you adjusted it twice in a function
(except leaf functions). So don't see the need for two such registers.

> Comments welcome on how this is useful, or it allows neat tricks.  Is
> there a reason to have more than two?  Also comparison with existing...

29k was a fun processor to program! Not sure how well its 3 ported
256 register file would have scaled in speed. Perhaps modern compilers
would have made better use of its huge register set. On the other hand
a large register set made context switching between threads expensive.
It also needed to maintain a separate memory stack which complicated
things. Because of that I felt it would be better to have reg# fields
in an instructions reference *memory* relative to a stack ptr. Then
stack adjustment could be seen as a hint to move data between the cache
and memory (or throw stale data away). And context switching would be
very quick.

Bakul Shah

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Thread

indexing register Joe Keane <jgk@jgk.org> - 2011-08-24 19:36 +0000
  Re: indexing register Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-24 13:38 -0700
  Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-24 18:44 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-24 22:24 -0400
      Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:08 -0700
        Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:16 -0700
      Re: indexing register Thomas Womack <twomack@chiark.greenend.org.uk> - 2011-08-25 11:05 +0100
    Re: indexing register nmm1@cam.ac.uk - 2011-08-25 08:29 +0100
    Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-26 13:42 -0700
      Re: indexing register EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-26 19:32 -0400
      Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 18:53 -0500
        Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-26 20:46 -0400
          Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 23:34 -0500
            Re: indexing register mac <acolvin@efunct.com> - 2011-08-28 17:23 +0000
          Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-27 14:10 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 18:19 -0500
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 20:39 -0500
      Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-28 20:59 -0700
    Re: indexing register jgk@panix.com (Joe keane) - 2011-08-29 21:59 +0000
  Re: indexing register Bakul Shah <usenet@bitblocks.com> - 2011-08-25 22:46 -0700
    Re: indexing register mac <acolvin@efunct.com> - 2011-08-26 14:06 +0000

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