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Groups > comp.arch > #3125

indexing register

From Joe Keane <jgk@jgk.org>
Newsgroups comp.arch
Subject indexing register
Date 2011-08-24 19:36 +0000
Organization PANIX Public Access Internet and UNIX, NYC
Message-ID <j33jr6$e0g$1@reader1.panix.com> (permalink)

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This is bouncing around my head.

Say we have a machine with a lot of general registers, at least 1024 and
possibly much more.  [There's some VLIWy stuff, but i think it's
irrelevant, so pretend i tell you it's a standard RISCy machine.]

We add a register BL (base latch).

Every op that get/put a register has a bit called 'index'.  If off, the
register number is in the op; if on, we add that to BL to get the correct
register number.  Now we can cheat a bit on the register field; maybe
the machine has 16384 registers, but we can only access 512 without
changing BL.

It's unclear whether access to BL is a KISS movtcr/movfcr, or we should
have some ops like save/restore.  It is tempting, we can put an adder
next to BL and he won't need to bother anyone.  In either case we also
want a compare with some bound; if out of whack, do something-or-other.

Basically register windows, but each op can choose to index or not.

Really, there's BL1 and BL2, and of course some way to switch between
them.  [Oh and you can't use it in the next instruction, the rule for
everything.]  Presumably it's not useful to let each op select.  Or
maybe three (ABL/FBL/SBL stolen from the VAX).

Comments welcome on how this is useful, or it allows neat tricks.  Is
there a reason to have more than two?  Also comparison with existing...

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Thread

indexing register Joe Keane <jgk@jgk.org> - 2011-08-24 19:36 +0000
  Re: indexing register Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-24 13:38 -0700
  Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-24 18:44 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-24 22:24 -0400
      Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:08 -0700
        Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:16 -0700
      Re: indexing register Thomas Womack <twomack@chiark.greenend.org.uk> - 2011-08-25 11:05 +0100
    Re: indexing register nmm1@cam.ac.uk - 2011-08-25 08:29 +0100
    Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-26 13:42 -0700
      Re: indexing register EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-26 19:32 -0400
      Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 18:53 -0500
        Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-26 20:46 -0400
          Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 23:34 -0500
            Re: indexing register mac <acolvin@efunct.com> - 2011-08-28 17:23 +0000
          Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-27 14:10 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 18:19 -0500
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 20:39 -0500
      Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-28 20:59 -0700
    Re: indexing register jgk@panix.com (Joe keane) - 2011-08-29 21:59 +0000
  Re: indexing register Bakul Shah <usenet@bitblocks.com> - 2011-08-25 22:46 -0700
    Re: indexing register mac <acolvin@efunct.com> - 2011-08-26 14:06 +0000

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