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Groups > linux.kernel > #1574399
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins |
| Date | 2017-02-06 08:10 +0100 |
| Message-ID | <t7LB1-1HH-27@gated-at.bofh.it> (permalink) |
| References | <t7LB0-1HH-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
The UART3 pin group for the CTS and RTS signals doesn't follow our usual
pattern. Rename it so that it matches.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +-
arch/arm/boot/dts/sun5i.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index e86fa46fdd45..c9a18216674a 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -281,7 +281,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_a>,
- <&uart3_pins_cts_rts_a>;
+ <&uart3_cts_rts_pins_a>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index cd951e2cdbe7..d4888e0a0a13 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -351,7 +351,7 @@
function = "uart3";
};
- uart3_pins_cts_rts_a: uart3-cts-rts@0 {
+ uart3_cts_rts_pins_a: uart3-cts-rts@0 {
pins = "PG11", "PG12";
function = "uart3";
};
--
git-series 0.8.11
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[PATCH 0/9] ARM: sun5i: Cleanup and reorganisation of the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
[PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:30 +0100
[PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
[PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
[PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 7/9] ARM: sun5i: a10s: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
[PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:40 +0100
Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
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