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Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern

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On Mon, Feb 06, 2017 at 03:15:15PM +0800, Chen-Yu Tsai wrote:
> On Mon, Feb 6, 2017 at 2:49 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The pwm0_pins group name is suggesting that this is the only option usable
> > for the PWM0 on the SoCs it's declared on. However, this is not the case
> > and defining a second pwm0 group would be quite weird given the name of the
> > first group.
> 
> Can you elaborate on the second pwm0 option? I'm not seeing it in my datasheets.

Hmmmm, I'm not sure why I did that anymore, looks like you're right...

I'll drop this one, and queue the others for 4.12.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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[PATCH 0/9] ARM: sun5i: Cleanup and reorganisation of the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
  [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the  common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:30 +0100
  [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
      Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
  [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
      Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual  pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
  [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the  common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 7/9] ARM: sun5i: a10s: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
  [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:40 +0100
      Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100

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