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Groups > linux.kernel > #1574397
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern |
| Date | 2017-02-06 08:10 +0100 |
| Message-ID | <t7LB0-1HH-21@gated-at.bofh.it> (permalink) |
| References | <t7LB0-1HH-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
The pwm0_pins group name is suggesting that this is the only option usable
for the PWM0 on the SoCs it's declared on. However, this is not the case
and defining a second pwm0 group would be quite weird given the name of the
first group.
Rename it so that it matches our usual pattern.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts | 2 +-
arch/arm/boot/dts/sun5i.dtsi | 10 +++++-----
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi | 2 +-
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
index 42435454acef..1bc87523b37c 100644
--- a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
+++ b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
@@ -157,7 +157,7 @@
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins>;
+ pinctrl-0 = <&pwm0_pins_a>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index a9574a6cd95c..fce3ec693531 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -321,6 +321,11 @@
bias-pull-up;
};
+ pwm0_pins_a: pwm0@0 {
+ pins = "PB2";
+ function = "pwm0";
+ };
+
spi2_pins_a: spi2@0 {
pins = "PE1", "PE2", "PE3";
function = "spi2";
@@ -340,11 +345,6 @@
pins = "PG11", "PG12";
function = "uart3";
};
-
- pwm0_pins: pwm0 {
- pins = "PB2";
- function = "pwm";
- };
};
timer@01c20c00 {
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 35008b78d899..b558d318a72e 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -316,7 +316,7 @@
bias-pull-up;
};
- pwm0_pins: pwm0 {
+ pwm0_pins_a: pwm0 {
pins = "PH0";
function = "pwm0";
};
diff --git a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi
index b8241462fcea..5cd891942fe3 100644
--- a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi
@@ -78,6 +78,6 @@
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins>;
+ pinctrl-0 = <&pwm0_pins_a>;
status = "okay";
};
--
git-series 0.8.11
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[PATCH 0/9] ARM: sun5i: Cleanup and reorganisation of the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
[PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:30 +0100
[PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
[PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
[PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
[PATCH 7/9] ARM: sun5i: a10s: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
[PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:40 +0100
Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
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