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Groups > linux.kernel > #1558624
| From | Joao Pinto <Joao.Pinto@synopsys.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc |
| Date | 2017-01-13 18:30 +0100 |
| Message-ID | <sZdPQ-3DF-37@gated-at.bofh.it> (permalink) |
| References | <sYKNQ-2Nu-3@gated-at.bofh.it> <sYKXv-2QD-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi,
Às 10:25 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
> *num-lanes* dt property is parsed in dw_pcie_host_init. However
> *num-lanes* property is applicable to both root complex mode and
> endpoint mode. As a first step, move the parsing of this property
> outside dw_pcie_host_init. This is in preparation for splitting
> pcie-designware.c to pcie-designware.c and pcie-designware-host.c
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/pci/dwc/pcie-designware.c | 18 +++++++++++-------
> drivers/pci/dwc/pcie-designware.h | 1 -
> 2 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c
> index 00a0fdc..89cdb6b 100644
> --- a/drivers/pci/dwc/pcie-designware.c
> +++ b/drivers/pci/dwc/pcie-designware.c
> @@ -551,10 +551,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> }
> }
>
> - ret = of_property_read_u32(np, "num-lanes", &pci->lanes);
> - if (ret)
> - pci->lanes = 0;
> -
> ret = of_property_read_u32(np, "num-viewport", &pci->num_viewport);
> if (ret)
> pci->num_viewport = 2;
> @@ -751,18 +747,26 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
>
> void dw_pcie_setup_rc(struct pcie_port *pp)
> {
> + int ret;
> + u32 lanes;
> u32 val;
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> + struct device *dev = pci->dev;
> + struct device_node *np = dev->of_node;
>
> /* get iATU unroll support */
> pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);
> dev_dbg(pci->dev, "iATU unroll: %s\n",
> pci->iatu_unroll_enabled ? "enabled" : "disabled");
>
> + ret = of_property_read_u32(np, "num-lanes", &lanes);
> + if (ret)
> + lanes = 0;
You moved from host_init to root complex setup function, which in my opinion did
not improve (in this scope).
I suggest that instead of making so much intermediary patches, which is nice to
understand your development sequence, but hard to review. Wouldn't be better to
condense some of the patches? We would have a cloear vision of the final product :)
Joao
> +
> /* set the number of lanes */
> val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
> val &= ~PORT_LINK_MODE_MASK;
> - switch (pci->lanes) {
> + switch (lanes) {
> case 1:
> val |= PORT_LINK_MODE_1_LANES;
> break;
> @@ -776,7 +780,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
> val |= PORT_LINK_MODE_8_LANES;
> break;
> default:
> - dev_err(pci->dev, "num-lanes %u: invalid value\n", pci->lanes);
> + dev_err(pci->dev, "num-lanes %u: invalid value\n", lanes);
> return;
> }
> dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
> @@ -784,7 +788,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
> /* set link width speed control register */
> val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
> val &= ~PORT_LOGIC_LINK_WIDTH_MASK;
> - switch (pci->lanes) {
> + switch (lanes) {
> case 1:
> val |= PORT_LOGIC_LINK_WIDTH_1_LANES;
> break;
> diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
> index d4b3d43..491fbe3 100644
> --- a/drivers/pci/dwc/pcie-designware.h
> +++ b/drivers/pci/dwc/pcie-designware.h
> @@ -148,7 +148,6 @@ struct dw_pcie_ops {
> struct dw_pcie {
> struct device *dev;
> void __iomem *dbi_base;
> - u32 lanes;
> u32 num_viewport;
> u8 iatu_unroll_enabled;
> struct pcie_port pp;
>
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[PATCH 00/37] PCI: Support for configurable PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:30 +0100
[PATCH 23/37] PCI: dwc: Add *ops* to start and stop pcie link Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:30 +0100
[PATCH 26/37] PCI: dwc: dra7xx: Facilitate wrapper and msi interrupts to be enabled independently Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 32/37] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:30 +0100
Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 06:30 +0100
Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 11:30 +0100
[PATCH 29/37] PCI: dwc: dra7xx: Workaround for errata id i870 Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 07/37] PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
Re: [PATCH 07/37] PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:30 +0100
[PATCH 20/37] Documentation: PCI: Add binding documentation for pci-test endpoint function Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 33/37] tools: PCI: Add a userspace tool to test PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 35/37] MAINTAINERS: add PCI EP maintainer Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 37/37] ARM: dts: DRA7: Add pcie1 dt node for EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 30/37] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 17/37] Documentation: PCI: Guide to use pci endpoint configfs Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 34/37] tools: PCI: Add sample test script to invoke pcitest Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 22/37] PCI: dwc: Modify dbi accessors to access data of 4/2/1 bytes Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 15/37] Documentation: PCI: Guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Tony Lindgren <tony@atomide.com> - 2017-01-13 18:20 +0100
Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 07:10 +0100
[PATCH 05/37] PCI: dwc: Add platform_set_drvdata Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
Re: [PATCH 05/37] PCI: dwc: Add platform_set_drvdata Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:20 +0100
[PATCH 19/37] PCI: endpoint: functions: Add an EP function to test PCI Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 18/37] Documentation: PCI: Add specification for the *pci test* function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 25/37] dt-bindings: PCI: Add dt bindings for pci designware EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 27/37] PCI: dwc: dra7xx: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 28/37] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 31/37] misc: Add host side pci driver for pci test function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 24/37] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 21/37] PCI: dwc: Modify dbi accessors to take dbi_base as argument Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
[PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100
Re: [PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 17:50 +0100
[PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:00 +0100
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 06:30 +0100
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 11:30 +0100
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 12:40 +0100
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 14:40 +0100
[PATCH 03/37] PCI: dwc: dra7xx: Populate cpu_addr_fixup ops Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100
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