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Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files

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Às 11:30 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
> Hi Joao,
> 
> On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:
>>
>> Hi,
>>
>> Às 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
>>> Hi Joao,
>>>
>>> On Friday 13 January 2017 10:19 PM, Joao Pinto wrote:
>>>> Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
>>>>> Split pcie-designware.c into pcie-designware-host.c that contains
>>>>> the host specific parts of the driver and pcie-designware.c that
>>>>> contains the parts used by both host driver and endpoint driver.
>>>>>
>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>>>> ---
>>>>>  drivers/pci/dwc/Makefile               |    2 +-
>>>>>  drivers/pci/dwc/pcie-designware-host.c |  619 ++++++++++++++++++++++++++++++++
>>>>>  drivers/pci/dwc/pcie-designware.c      |  613 +------------------------------
>>>>>  drivers/pci/dwc/pcie-designware.h      |    8 +
>>>>>  4 files changed, 634 insertions(+), 608 deletions(-)
>>>>>  create mode 100644 drivers/pci/dwc/pcie-designware-host.c
>>>>>
>>>>> diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile
>>>>> index 7d27c14..3b57e55 100644
>>>>> --- a/drivers/pci/dwc/Makefile
>>>>> +++ b/drivers/pci/dwc/Makefile
>>>>> @@ -1,4 +1,4 @@
>>>>
>>>> (snip...)
>>>>
>>>>> -static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
>>>>> -				      int type, u64 cpu_addr, u64 pci_addr,
>>>>> -				      u32 size)
>>>>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
>>>>> +			       u64 cpu_addr, u64 pci_addr, u32 size)
>>>>>  {
>>>>>  	u32 retries, val;
>>>>>  
>>>>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
>>>>>  	dev_err(pci->dev, "iATU is not being enabled\n");
>>>>>  }
>>>>
>>>> Kishon, iATU only makes sense in The Root Complex (host), so it should be inside
>>>> the pcie-designware-host.
>>>
>>> That is not true. Outbound ATU should be programmed to access host side buffers
>>> and inbound ATU should be programmed for the host to access EP mem space.
>>
>> Sorry, I was not clear enough. What I was trying to suggest is, since the ATU
>> programming is done by the host, wouldn't be better to include it in the
>> pcie-designware-host? It is just an architectural detail.
> 
> ATU programming is required in EP mode. See "[PATCH 24/37] PCI: dwc:
> designware: Add EP mode support" in this patch series.
> 
> Anything that's required by both EP mode and RC mode, I've placed in
> pcie-designware.c

Agreed!

> 
> Thanks
> Kishon
> 

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[PATCH 00/37] PCI: Support for configurable PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:30 +0100
  [PATCH 23/37] PCI: dwc: Add *ops* to start and stop pcie link Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:30 +0100
  [PATCH 26/37] PCI: dwc: dra7xx: Facilitate wrapper and msi interrupts to be enabled independently Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 32/37] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in  dw_pcie_setup_rc Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:30 +0100
      Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in  dw_pcie_setup_rc Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 06:30 +0100
        Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in  dw_pcie_setup_rc Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 11:30 +0100
  [PATCH 29/37] PCI: dwc: dra7xx: Workaround for errata id i870 Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 07/37] PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 07/37] PCI: dwc: designware: Get device pointer at the  start of dw_pcie_host_init Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:30 +0100
  [PATCH 20/37] Documentation: PCI: Add binding documentation for pci-test endpoint function Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 33/37] tools: PCI: Add a userspace tool to test PCI endpoint Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 35/37] MAINTAINERS: add PCI EP maintainer Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 37/37] ARM: dts: DRA7: Add pcie1 dt node for EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 37/37] ARM: dts: DRA7: Add pcie1 dt node for EP mode Tony Lindgren <tony@atomide.com> - 2017-01-20 19:40 +0100
  [PATCH 30/37] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 30/37] dt-bindings: PCI: dra7xx: Add dt bindings to  enable legacy mode Rob Herring <robh@kernel.org> - 2017-01-18 23:00 +0100
  [PATCH 17/37] Documentation: PCI: Guide to use pci endpoint configfs Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 34/37] tools: PCI: Add sample test script to invoke pcitest Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 22/37] PCI: dwc: Modify dbi accessors to access data of 4/2/1 bytes Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 15/37] Documentation: PCI: Guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of  CM_PCIE_CLKSTCTRL to SW_WKUP Tony Lindgren <tony@atomide.com> - 2017-01-13 18:20 +0100
      Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of  CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 07:10 +0100
        Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of  CM_PCIE_CLKSTCTRL to SW_WKUP Tony Lindgren <tony@atomide.com> - 2017-01-20 19:40 +0100
  [PATCH 05/37] PCI: dwc: Add platform_set_drvdata Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 05/37] PCI: dwc: Add platform_set_drvdata Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:20 +0100
  [PATCH 19/37] PCI: endpoint: functions: Add an EP function to test PCI Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 18/37] Documentation: PCI: Add specification for the *pci test* function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 25/37] dt-bindings: PCI: Add dt bindings for pci designware EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 25/37] dt-bindings: PCI: Add dt bindings for pci  designware EP mode Rob Herring <robh@kernel.org> - 2017-01-18 22:50 +0100
  [PATCH 27/37] PCI: dwc: dra7xx: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 28/37] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 28/37] dt-bindings: PCI: dra7xx: Add dt bindings for pci  dra7xx EP mode Rob Herring <robh@kernel.org> - 2017-01-18 22:50 +0100
  [PATCH 31/37] misc: Add host side pci driver for pci test function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
    Re: [PATCH 31/37] misc: Add host side pci driver for pci test  function device Christoph Hellwig <hch@infradead.org> - 2017-01-24 17:10 +0100
      Re: [PATCH 31/37] misc: Add host side pci driver for pci test  function device Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-25 06:50 +0100
  [PATCH 24/37] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 21/37] PCI: dwc: Modify dbi accessors to take dbi_base as argument Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:40 +0100
  [PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100
    Re: [PATCH 10/37] PCI: dwc: designware: Fix style errors in  pcie-designware.c Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 17:50 +0100
  [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core  files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100
    Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and  core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-13 18:00 +0100
      Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and  core files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 06:30 +0100
        Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and  core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 11:30 +0100
          Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and  core files Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 12:40 +0100
            Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and  core files Joao Pinto <Joao.Pinto@synopsys.com> - 2017-01-16 14:40 +0100
  [PATCH 03/37] PCI: dwc: dra7xx: Populate cpu_addr_fixup ops Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-12 11:50 +0100

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