Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1400402
| From | Brian Norris <briannorris@chromium.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance |
| Date | 2016-05-13 00:50 +0200 |
| Message-ID | <ry7AC-77L-17@gated-at.bofh.it> (permalink) |
| References | <ry7AB-77L-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Shawn Lin <shawn.lin@rock-chips.com>
Signal integrity analysis has suggested we set these values. Do this in
power_on(), so that they get reconfigured after suspend/resume.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
drivers/phy/phy-rockchip-emmc.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c
index 48cbe691a889..5641dede32f6 100644
--- a/drivers/phy/phy-rockchip-emmc.c
+++ b/drivers/phy/phy-rockchip-emmc.c
@@ -56,6 +56,19 @@
#define PHYCTRL_DLLRDY_SHIFT 0x5
#define PHYCTRL_DLLRDY_DONE 0x1
#define PHYCTRL_DLLRDY_GOING 0x0
+#define PHYCTRL_FREQSEL_200M 0x0
+#define PHYCTRL_FREQSEL_50M 0x1
+#define PHYCTRL_FREQSEL_100M 0x2
+#define PHYCTRL_FREQSEL_150M 0x3
+#define PHYCTRL_FREQSEL_MASK 0x3
+#define PHYCTRL_FREQSEL_SHIFT 0xc
+#define PHYCTRL_DR_MASK 0x7
+#define PHYCTRL_DR_SHIFT 0x4
+#define PHYCTRL_DR_50OHM 0x0
+#define PHYCTRL_DR_33OHM 0x1
+#define PHYCTRL_DR_66OHM 0x2
+#define PHYCTRL_DR_100OHM 0x3
+#define PHYCTRL_DR_40OHM 0x4
struct rockchip_emmc_phy {
unsigned int reg_offset;
@@ -154,6 +167,20 @@ static int rockchip_emmc_phy_power_on(struct phy *phy)
struct rockchip_emmc_phy *rk_phy = phy_get_drvdata(phy);
int ret = 0;
+ /* DLL operation: 170 to 200 MHz */
+ regmap_write(rk_phy->reg_base,
+ rk_phy->reg_offset + GRF_EMMCPHY_CON0,
+ HIWORD_UPDATE(PHYCTRL_FREQSEL_200M,
+ PHYCTRL_FREQSEL_MASK,
+ PHYCTRL_FREQSEL_SHIFT));
+
+ /* Drive impedance: 50 Ohm */
+ regmap_write(rk_phy->reg_base,
+ rk_phy->reg_offset + GRF_EMMCPHY_CON6,
+ HIWORD_UPDATE(PHYCTRL_DR_50OHM,
+ PHYCTRL_DR_MASK,
+ PHYCTRL_DR_SHIFT));
+
/* Power up emmc phy analog blocks */
ret = rockchip_emmc_phy_power(rk_phy, PHYCTRL_PDB_PWR_ON);
if (ret)
--
2.8.0.rc3.226.g39d4020
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 1/4] phy: rockchip-emmc: give DLL some extra time to be ready Brian Norris <briannorris@chromium.org> - 2016-05-13 00:50 +0200
[PATCH 3/4] phy: rockchip-emmc: configure default output tap delay Brian Norris <briannorris@chromium.org> - 2016-05-13 00:50 +0200
Re: [PATCH 3/4] phy: rockchip-emmc: configure default output tap delay Doug Anderson <dianders@chromium.org> - 2016-05-14 00:30 +0200
Re: [PATCH 3/4] phy: rockchip-emmc: configure default output tap delay Shawn Lin <shawn.lin@rock-chips.com> - 2016-05-16 06:20 +0200
Re: [PATCH 3/4] phy: rockchip-emmc: configure default output tap delay Doug Anderson <dianders@chromium.org> - 2016-05-16 17:20 +0200
[PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Brian Norris <briannorris@chromium.org> - 2016-05-13 00:50 +0200
Re: [PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Shawn Lin <shawn.lin@rock-chips.com> - 2016-05-13 03:10 +0200
Re: [PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Doug Anderson <dianders@chromium.org> - 2016-05-13 20:50 +0200
Re: [PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Brian Norris <briannorris@chromium.org> - 2016-05-13 23:10 +0200
Re: [PATCH 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Doug Anderson <dianders@chromium.org> - 2016-05-24 07:00 +0200
[PATCH v2 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Brian Norris <briannorris@chromium.org> - 2016-05-13 23:10 +0200
Re: [PATCH v2 2/4] phy: rockchip-emmc: configure frequency range and drive impedance Doug Anderson <dianders@chromium.org> - 2016-05-14 00:10 +0200
[PATCH 4/4] phy: rockchip-emmc: reindent the register definitions Brian Norris <briannorris@chromium.org> - 2016-05-13 00:50 +0200
Re: [PATCH 4/4] phy: rockchip-emmc: reindent the register definitions Doug Anderson <dianders@chromium.org> - 2016-05-14 00:30 +0200
Re: [PATCH 1/4] phy: rockchip-emmc: give DLL some extra time to be ready Doug Anderson <dianders@chromium.org> - 2016-05-14 00:10 +0200
csiph-web