Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver

From	Mathias Kresin <openwrt@kresin.me>
Newsgroups	linux.kernel
Subject	Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver
Date	2016-05-19 12:10 +0200
Message-ID	<rAt3Y-6L2-13@gated-at.bofh.it> (permalink)
References	<rAccO-4lF-15@gated-at.bofh.it> <rAcw9-4sK-3@gated-at.bofh.it> <rAodX-3xB-7@gated-at.bofh.it> <rAq66-4HY-3@gated-at.bofh.it> <rAqfL-50p-1@gated-at.bofh.it>
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2016-05-19 9:03 GMT+02:00 John Crispin <john@phrozen.org>:
> On 19/05/2016 08:57, Alexander Stein wrote:
>> Thanks for the link, I wasn't aware of that patch. I like it in general, but
>> there are some things I'd like to get addressed first:
>> * vr9_gphy_of_reg_init() writes uncoditionally to led3h and led3l even on
>>   PEf7071 which does not have this register at all
>
> we use this driver mainly on the 11g and 22f version. mathias recently
> added the led3 handling.
>
> @Mathias, can you have a look at this and fix it inside the lede tree ?

Well, I haven't added the led3 handling, I've only changed the initial
value (function) of led3.

Maybe it's cleaner to not use a default value for the led function and
completely rely on the device tree bindings. But by adjusting the
initial values, I had to change only the led function of one board in
the openwrt xrx200 subtarget instead of touching all dts files.

I know that the LTQ Datasheet for the PEF 7071 Version 1.5 mentions
the led3 control register albeit there is no pin for a forth led. So I
guess it's safe to write to the led3 register even for the PEF 7071.

Mathias

Thread

[PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-18 18:10 +0200
  Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Florian Fainelli <f.fainelli@gmail.com> - 2016-05-18 18:30 +0200
    Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Andrew Lunn <andrew@lunn.ch> - 2016-05-18 19:10 +0200
      Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-19 09:10 +0200
        Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Andrew Lunn <andrew@lunn.ch> - 2016-05-19 14:20 +0200
    Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver John Crispin <john@phrozen.org> - 2016-05-19 07:00 +0200
      Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-19 09:00 +0200
        Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver John Crispin <john@phrozen.org> - 2016-05-19 09:10 +0200
          Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-19 09:30 +0200
          Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Mathias Kresin <openwrt@kresin.me> - 2016-05-19 12:10 +0200
            Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-19 12:30 +0200
              RE: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver "Mehrtens, Hauke" <hauke.mehrtens@intel.com> - 2016-05-23 11:20 +0200
                Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Alexander Stein <alexander.stein@systec-electronic.com> - 2016-05-23 12:00 +0200
                Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver Mathias Kresin <openwrt@kresin.me> - 2016-05-23 12:10 +0200

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