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Re: Identification of modules

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On 3/31/2017 4:14 PM, Piotr Wyderski wrote:
> rickman wrote:
>
>> 2 dedicated signals per slot is simple but 3 isn't?
>
> 3 signals from each slot will need to be interleaved
> on the PCB, while 2 make non-interleaved busses.
>
>> I believe you said somewhere else that the 2 are already used
>> for other functions.  How will the analog voltage get into the card?
>
> From above, through holes drilled in an appropriate place
> to connect two THT resistors.
>
> https://postimg.org/image/ligbk01nl/
>
> This is what I consider simple. 2 busses on the edges
> of the connectors, common signals in the middle, the
> slot ID resistor dividers connected to pins 5.

It's not important that I understand all the details, but I don't see 
how it would be any worse to have a third or fourth independent signal 
to/from each board.  You say they would be "interleaved" with the 
others, but you don't explain why that would be a problem.

You actually have 3 independent, non-bused signals to each board now.


>> You haven't said *where* the CPUs are.
>
> Technically, on a special module, they have their dedicated
> connectors on the backplane and drive the lines from the image above.

Ok, that's what I would have expected.  Are these modules pin out 
limited?  How many of the general modules will the backplane have?


>>  There are lots of things you haven't explained about your
>> system.  It's hard to suggest solutions when the system is not defined
>> fully.
>
> What would you like to be better defined, Rick?
> The backplane is a row of straight 20-gold pin connectors,
> the modules are to be installed vertically.

This problem is every time something is suggested, another requirement 
shows up, too "complex", no active circuitry on the back plane, too many 
pins on the CPU modules...

If I knew more about what you were already doing, I could know more 
about what you would find acceptable.

You are not happy with the ADC approach because the part is a couple of 
dollars.  You might be able to use a similar, but less costly approach. 
Maxim makes a 1 wire device with two PIOs (programmable input/output) 
for slightly over a dollar.  One bus line would be used to communicate 
with these devices.  A second bus line would be used to sense the slot 
and board type.

Each sense line would have a resistor in series with the output on the 
backplane.  The value of this resistor would correspond to the slot. 
This resistor value would be sensed by the CPU board by measuring the 
current when the plugin board pulls the card end of the sense resistor 
to ground with one of the PIOs.  The resistor values would need to be 
small allowing a relatively large current to flow.

To determine plugin card type, the other PIO would be activated to pull 
the sense pin low through a larger value resistor.  The CPU board would 
need to measure a much smaller current to distinguish the plugin card 
type.  If the steps in resistance values of the two functions are 
distinct enough, nothing special would need to be done to make all 
measurements.  But this would require very high precision devices.  It 
would be better to allow the two ranges to overlap and do the math to 
isolate the slot from the plugin card type.

Or... the slot can be detected by measuring the current when the sense 
pin is grounded by the plugin card.  The plugin card type can be 
detected by measuring the voltage on the sense bus when a voltage 
divider is enabled and the voltage source on the bus is disabled.

This may take a little circuitry on the CPU card, but it should be 
pretty minimal.

                R1                      Sense Bus
Vcc  -->>----/\/\/----+                   ^
                       |                   |
           +------+    |  Sense Pin        |
           |  SWa |----+------>>----/\/\/--+-----> to CPU
1 Wire    |      |    |            RslotN |    sense circuit
Comms ->>-|      |    <                   |
           |      |    > R2                |
           |      |    <                   |
           |      |    >                   |
           |      |    |                   V
           |  SWb |----+                Sense Bus
           +------+
              |
              V

I can think of another approach that would dispense with the 1 wire 
device altogether, but it would be a bit more complex on the plugin cards.

-- 

Rick C

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Thread

Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 09:21 +0200
  Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 01:31 -0700
    Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 10:36 +0200
      Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 02:16 -0700
        Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:39 +0200
          Re: Identification of modules Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-31 11:32 +0100
            Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 12:59 +0200
          Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 11:55 -0700
    Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:30 +0200
  Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 05:20 -0400
    Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:53 +0200
      Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 06:16 -0400
        Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 12:39 +0200
          Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 13:27 -0400
            Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 22:14 +0200
              Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 17:48 -0400
                Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-04-03 10:57 +0200
    Re: Identification of modules John Devereux <john@devereux.me.uk> - 2017-03-31 11:39 +0100
      Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 13:38 -0400
        Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 22:21 +0200
  Re: Identification of modules Joe Chisolm <jchisolm6@earthlink.net> - 2017-03-31 13:02 -0500
  Re: Identification of modules Tim Wescott <seemywebsite@myfooter.really> - 2017-03-31 16:18 -0500

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