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Groups > sci.electronics.design > #454879
| From | Piotr Wyderski <peter.pan@neverland.mil> |
|---|---|
| Newsgroups | sci.electronics.design |
| Subject | Re: Identification of modules |
| Date | 2017-04-03 10:57 +0200 |
| Organization | ATMAN - ATM S.A. |
| Message-ID | <obt2qo$66a$1@node2.news.atman.pl> (permalink) |
| References | (3 earlier) <obla43$v8b$1@dont-email.me> <oblbl2$via$1@node1.news.atman.pl> <obm3db$mmh$1@dont-email.me> <obmdcf$3er$1@node1.news.atman.pl> <obmim8$d5t$1@dont-email.me> |
rickman wrote:
> Ok, that's what I would have expected. Are these modules pin out
> limited?
Yes, by the allowed width of the connector, i.e. by the PCB size.
20 pins is about as far as I can go without using crazy density connectors.
> How many of the general modules will the backplane have?
Depends on the version, (1..4)x8.
> If I knew more about what you were already doing, I could know more
> about what you would find acceptable.
You all have made me rethink the problem and make use of the existing
circuitry to piggyback the identification on the top of the existing
protocol. The input of the module always looks like a shift register,
so I can simply shift in the module ID during a designated phase and
use the shift register output to drive an NMOS which connects an
appropriate resistor to the bus, forming a gated voltage divider.
Since the value shifted out will be exactly what was shifted in,
by appropriately forming the pattern I can make only the selected
module to respond. Plus a tiny bit of circuitry to protect the
protocol against always 0/always 1 shift register failures, which
brings a certain level of self-diagnostics. This is basically an
extension of the solution you proposed with the adressable switch.
Problem solved, thank you all very much!
Best regards, Piotr
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Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 09:21 +0200
Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 01:31 -0700
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 10:36 +0200
Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 02:16 -0700
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:39 +0200
Re: Identification of modules Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-31 11:32 +0100
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 12:59 +0200
Re: Identification of modules Don Y <blockedofcourse@foo.invalid> - 2017-03-31 11:55 -0700
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:30 +0200
Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 05:20 -0400
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 11:53 +0200
Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 06:16 -0400
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 12:39 +0200
Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 13:27 -0400
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 22:14 +0200
Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 17:48 -0400
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-04-03 10:57 +0200
Re: Identification of modules John Devereux <john@devereux.me.uk> - 2017-03-31 11:39 +0100
Re: Identification of modules rickman <gnuarm@gmail.com> - 2017-03-31 13:38 -0400
Re: Identification of modules Piotr Wyderski <peter.pan@neverland.mil> - 2017-03-31 22:21 +0200
Re: Identification of modules Joe Chisolm <jchisolm6@earthlink.net> - 2017-03-31 13:02 -0500
Re: Identification of modules Tim Wescott <seemywebsite@myfooter.really> - 2017-03-31 16:18 -0500
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