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Groups > sci.electronics.design > #429916
| From | Frank Miles <fpm@u.washington.edu> |
|---|---|
| Newsgroups | sci.electronics.design |
| Subject | Re: Input (protection) FET or npn |
| Date | 2016-09-30 15:28 +0000 |
| Organization | A noiseless patient Spider |
| Message-ID | <nsm0a9$kis$1@dont-email.me> (permalink) |
| References | <2ab9c28c-9be2-4569-bf51-56ba6febd9a7@googlegroups.com> <84e48ca4-380c-4bee-94d9-e2c7ac6a6392@googlegroups.com> |
On Fri, 30 Sep 2016 08:05:41 -0700, George Herold wrote: > On Friday, September 30, 2016 at 10:52:48 AM UTC-4, George Herold wrote: >> Hi all a simple input circuit take a input pulse. And stretches it a bit. >> (from previous post on pulse stretching.) >> The input looks like this.. (bad asci art) >> >> +5V >> +--------+ >> | R(1M) >> _ ---+ >> ^ | | >> | |/c +--->'HC14 >> pulse in---R(100)-+---| | >> | |\e C(.1u) >> _ | | >> ^ GND+ >> | >> GND >> >> 100 ohms in series and diodes to the rails. >> I can then either drive a FET (2n7000) or npn (2n4401) >> both work fine. >> The exact width of the output pulse is not critical. >> Which is more robust? >> >> George H. > > Oops there is also 10k ohm to ground on the base/gate of the transistor > so that it's off when no input is connected. > > GH Either should work fine. Unless you need the fastest possible 'reset', I'd increase the input resistor value (bipolar) or add a resistor in series with the capacitor to limit surge current at turn-on (t.c. << minimum reset time).
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Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 07:52 -0700
Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:05 -0700
Re: Input (protection) FET or npn Frank Miles <fpm@u.washington.edu> - 2016-09-30 15:28 +0000
Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:52 -0700
Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 08:35 -0700
Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 08:54 -0700
Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 08:47 -0700
Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 09:14 -0700
Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 09:50 -0700
Re: Input (protection) FET or npn John S <Sophi.2@invalid.org> - 2016-09-30 12:19 -0500
Re: Input (protection) FET or npn George Herold <gherold@teachspin.com> - 2016-09-30 11:40 -0700
Re: Input (protection) FET or npn Joerg <news@analogconsultants.com> - 2016-09-30 12:38 -0700
Re: Input (protection) FET or npn John Larkin <jjlarkin@highlandtechnology.com> - 2016-09-30 13:15 -0700
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