Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > sci.electronics.design > #452540
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Newsgroups | sci.electronics.design |
| Subject | Re: bad, better delay circuits |
| Date | 2017-03-18 19:44 -0700 |
| Organization | highland technology |
| Message-ID | <91srcc9kbaqvpf5std40ch5205mfl46f9i@4ax.com> (permalink) |
| References | <1roqcclua35sdrn6jduc9q0folr3fg8oqu@4ax.com> <58cdee9d$0$36045$c3e8da3$76a7c58f@news.astraweb.com> |
On Sun, 19 Mar 2017 13:36:13 +1100, Clifford Heath <no.spam@please.net> wrote: >On 19/03/17 04:04, John Larkin wrote: >> >> >> We want to trim the rising edge times of some pulses. The obvious >> circuit is a current source + capacitor linear ramp followed by a >> comparator. >> >> The first circuit here was the initial idea, seems simple, until I >> started thinking harder. >> >> https://dl.dropboxusercontent.com/u/53724080/Circuits/Timing/Delay_Bad_Good.JPG >> >> BSS123 is about the best compromise between capacitance and ON >> resistance, and we have it. The two problems here are >> >> the g-d capacitance of Q1 shoots an ugly negative spike into C1 at >> ramp start > >You could ditch the inverter for a flip-flop, and add a coupling >capacitor from /Q to cancel the g-d capacitance spike... as long >as you could get close enough tolerance to match it. That sort of thing is always tricky. To keep the ramp from wobbling at the start, the charge injections would have to be time aligned. The diode is a lot easier. -- John Larkin Highland Technology, Inc lunatic fringe electronics
Back to sci.electronics.design | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 10:04 -0700
Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-18 12:29 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 16:15 -0700
Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-18 19:08 -0700
Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-18 17:02 -0500
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 16:25 -0700
Re: bad, better delay circuits rickman <gnuarm@gmail.com> - 2017-03-18 19:40 -0400
Re: bad, better delay circuits dagmargoodboat@yahoo.com - 2017-03-19 10:42 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 15:37 -0700
Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-19 22:24 -0500
Re: bad, better delay circuits dagmargoodboat@yahoo.com - 2017-03-20 08:58 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-20 09:42 -0700
Re: bad, better delay circuits Robert Baer <robertbaer@localnet.com> - 2017-03-20 23:55 -0800
Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-21 00:46 -0500
Re: bad, better delay circuits bill.sloman@ieee.org - 2017-03-21 22:54 -0700
Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-22 02:10 -0500
Re: bad, better delay circuits rickman <gnuarm@gmail.com> - 2017-03-19 18:47 -0400
Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-20 09:55 +1100
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 16:12 -0700
Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-19 10:32 -0500
Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-19 13:36 +1100
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 19:44 -0700
Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-19 15:58 +1100
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 15:43 -0700
Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-19 17:54 -0700
Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-20 12:44 +1100
Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-20 12:22 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-20 15:49 -0700
Re: bad, better delay circuits whit3rd <whit3rd@gmail.com> - 2017-03-18 23:51 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 08:22 -0700
Re: bad, better delay circuits George Herold <gherold@teachspin.com> - 2017-03-20 17:55 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 08:54 -0700
Re: bad, better delay circuits JM <dontreplytothis173@gmail.com> - 2017-03-22 16:02 +0000
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 09:47 -0700
Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-22 10:31 -0700
Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 10:52 -0700
csiph-web