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bad, better delay circuits

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We want to trim the rising edge times of some pulses. The obvious
circuit is a current source + capacitor linear ramp followed by a
comparator.

The first circuit here was the initial idea, seems simple, until I
started thinking harder.

https://dl.dropboxusercontent.com/u/53724080/Circuits/Timing/Delay_Bad_Good.JPG

BSS123 is about the best compromise between capacitance and ON
resistance, and we have it. The two problems here are

the g-d capacitance of Q1 shoots an ugly negative spike into C1 at
ramp start and

the drain capacitance of Q2 is nonlinear, which is maybe OK, but the
drain voltage can wander all over the place. That modulates the ramp
slope, and the body diode could conduct at ramp discharge time. Fixes
for that are variations of ugly.

E-Phemts would be better than mosfets, but that would multiply the
parts cost by 5x or so. Open-drain cmos gates could be interesting,
but we don't have any in stock


The second circuit looks better. The mux switches in C2, or keeps it
grounded. These "bus switch" parts are actually killer analog
multiplexers at a fraction of the price of things sold as analog
mux's.

The comparator is of course an LVDS line receiver, another example of
using a part off-label and saving a bunch of dollars and nanoseconds.

Another bus switch could be used to discharge the cap, instead of the
diode, but sadly their control-input delays are high. That's the
pattern in mux's: fast signal path, slow switching.




-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 10:04 -0700
  Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-18 12:29 -0700
    Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 16:15 -0700
      Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-18 19:08 -0700
  Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-18 17:02 -0500
    Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 16:25 -0700
      Re: bad, better delay circuits rickman <gnuarm@gmail.com> - 2017-03-18 19:40 -0400
        Re: bad, better delay circuits dagmargoodboat@yahoo.com - 2017-03-19 10:42 -0700
          Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 15:37 -0700
            Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-19 22:24 -0500
              Re: bad, better delay circuits dagmargoodboat@yahoo.com - 2017-03-20 08:58 -0700
                Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-20 09:42 -0700
                Re: bad, better delay circuits Robert Baer <robertbaer@localnet.com> - 2017-03-20 23:55 -0800
                Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-21 00:46 -0500
              Re: bad, better delay circuits bill.sloman@ieee.org - 2017-03-21 22:54 -0700
                Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-22 02:10 -0500
          Re: bad, better delay circuits rickman <gnuarm@gmail.com> - 2017-03-19 18:47 -0400
            Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-20 09:55 +1100
              Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 16:12 -0700
      Re: bad, better delay circuits "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-19 10:32 -0500
  Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-19 13:36 +1100
    Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-18 19:44 -0700
      Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-19 15:58 +1100
        Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 15:43 -0700
          Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-19 17:54 -0700
            Re: bad, better delay circuits Clifford Heath <no.spam@please.net> - 2017-03-20 12:44 +1100
              Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-20 12:22 -0700
                Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-20 15:49 -0700
  Re: bad, better delay circuits whit3rd <whit3rd@gmail.com> - 2017-03-18 23:51 -0700
    Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-19 08:22 -0700
  Re: bad, better delay circuits George Herold <gherold@teachspin.com> - 2017-03-20 17:55 -0700
  Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 08:54 -0700
    Re: bad, better delay circuits JM <dontreplytothis173@gmail.com> - 2017-03-22 16:02 +0000
      Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 09:47 -0700
    Re: bad, better delay circuits Winfield Hill <hill@rowland.harvard.edu> - 2017-03-22 10:31 -0700
      Re: bad, better delay circuits John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-22 10:52 -0700

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