Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > comp.arch > #6563

Re: Indirect Bit

Message-ID <4F8CF0CF.1020607@SPAM.comp-arch.net> (permalink)
Date 2012-04-16 21:25 -0700
From "Andy (Super) Glew" <andy@SPAM.comp-arch.net>
Organization comp-arch.net
Newsgroups comp.arch
Subject Re: Indirect Bit
References <4F84FB1E.6CD1FC88@sonic.net> <4F86ECC6.4060405@SPAM.comp-arch.net> <9v14o0F3snU1@mid.individual.net>

Show all headers | View raw

On 4/15/2012 4:42 PM, Andrew Reilly wrote:
> I'm confused by the use model where this notion of "sending code" makes
> sense.  Could you elaborate, please?  In my naiive imagination of how
> most processing (particularly HPC) happens at the moment, code is a pre-
> execution constant, and so fetching the code to any and all processors

Thanks, I meant to say something about this.  The last time we talked 
about this, a few months ago, Mitch said something like "sending code 
makes no sense, just send an instruction pointer and rely on the cache 
coherency model".  So, a few items:

(0) I do not necessarily assume a shared memory computer at all. Not 
necessarily just a message passing cluster - so called "web services", 
where you send a packet of code across a network like TCP/IP to be 
executed at a remote processor on whatever data it has locally - and 
then possibly forwarded on to some other remote node.

(1) You may have shared memory, but not necessarily cache coherent 
shared memory.

By the way, with the proper mindset code is never a pre-execution 
constant pre-loaded into all processors.  All the processors are doing 
something - in reset, finishing some previous job - and a new piece of 
code starts executing and slowly, slowly, parts of that code get 
propagated to the nodes that are executing them.

(2) By the way^2, if you say "Who the heck is building a non-cache 
coherent processor in this day and age?", well, (a) Lots of the 
supercomputer guys I was working with a few years ago were against cache 
consistency, and (b) it gets more interesting when you consider simple 
processing elements.  Such as the Processing In Memory (PIM) logic this 
thread has discussed - things that aren't a full fledged cache coherent 
processor, but just enough logic to follow a pointer (the indirect bit 
of the title) or to do a fetch-and-add, etc.  You can imagine a system 
that has both big cache coherent processors and such small PIM 
processing elements.  Now, I think it might be ugly to give up cache 
coherency for the PIM logic - but I can imagine a system where the PIM 
logic has no coherency hardware, but where the "instruction packets" 
that I have mentioned are just commands that flow along with the 
coherency messages.  E.g. there have been, and perhaps still are, 
systems where "increment memory location" is part of the cache coherence 
protocol, a bus command not unlike read-line or write-line that flows to 
wherever the data lives, and gets done there. Where "there" may be 
memory, but may also be some L1, L2, or Ln cache level, or a switch, or ....

(3) I'm also not averse to using this "instruction packet" concept in a 
cache coherent multiprocessor, where you may just be sending a PC 
around, and relying on cache coherency, as Mitch stated.  Well, of 
course, you will also be sending thread context around - privilege 
domain, address space, register contents - although it is also 
interesting to imagine relying on cache coherency to pick those up.

But, because I am also thinking of (0) non-shared memory and (1) and (2) 
non cache coherent shared memory, I am interested in the possibility 
that shared memory may be just an optimization.  Just as one often 
builds message passing supercomputers out of nodes that are individually 
shared memory.

(4) I guess that on the fly code generation is of some interest, but its 
not really necessary for what I was talking about.

(5) Finally, because I am a capability type of guy, I am interested in 
the possibility that these instruction packets or threadlets may not 
necessarily be in the same privilege domain as program that created them.

Back to comp.arch | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

Indirect Bit Mark Thorson <nospam@sonic.net> - 2012-04-10 19:31 -0800
  Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-11 01:29 -0500
    Re: Indirect Bit sarr.blumson@alum.dartmouth.org - 2012-04-11 14:48 +0000
      Re: Indirect Bit mac <acolvin@efunct.com> - 2012-04-12 14:43 +0000
    Re: Indirect Bit Morten Reistad <first@last.name> - 2012-04-22 15:19 +0200
      Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-22 23:24 -0700
  Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-11 08:32 +0200
    Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-11 05:49 -0700
      Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:22 -0700
        Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-13 08:14 -0700
          Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 16:13 -0700
            Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-13 20:01 -0700
              Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-14 03:16 +0000
                Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-14 08:14 -0700
        Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 16:05 -0700
          Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-13 17:01 -0700
            Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-14 13:49 -0700
          Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-13 20:07 -0400
          Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-14 18:47 +0200
          Re: Indirect Bit Morten Reistad <first@last.name> - 2012-04-22 15:26 +0200
            Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-22 23:25 -0700
              Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 09:18 +0100
                Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-23 19:35 -0400
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 08:37 +0100
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 09:42 +0100
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 01:58 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 11:26 +0100
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 05:02 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 13:58 +0100
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 10:07 -0700
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 04:30 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 13:01 +0100
  Re: Indirect Bit Stefan Monnier <monnier@iro.umontreal.ca> - 2012-04-11 10:03 -0400
  Re: Indirect Bit kenney@cix.compulink.co.uk - 2012-04-11 09:22 -0500
    Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 14:11 -0700
      Re: Indirect Bit Stefan Monnier <monnier@iro.umontreal.ca> - 2012-04-12 18:05 -0400
        Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 20:13 -0700
      Re: Indirect Bit Mark Thorson <nospam@sonic.net> - 2012-04-12 16:55 -0800
        Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 17:25 -0700
          Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-12 20:03 -0500
          Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:33 -0700
            Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 15:57 -0700
              Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-13 17:03 -0700
        Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 20:14 -0700
  Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-11 10:35 -0400
  Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-11 08:54 -0700
  Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 07:55 -0700
    Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-12 10:16 -0700
      Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-12 11:07 -0700
        Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:34 -0700
      Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-12 11:35 -0700
        Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:41 -0700
          Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-13 14:52 -0700
          Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-15 09:24 -0700
            Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-15 22:45 +0200
              Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-15 18:04 -0700
      Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:12 -0700
    Re: Indirect Bit timcaffrey@aol.com (Tim McCaffrey) - 2012-04-12 19:23 +0000
    Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-13 08:54 +0200
      Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-14 14:37 -0700
    Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-15 23:42 +0000
      Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 08:08 -0700
        Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-16 23:38 +0000
          Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-16 21:29 -0700
      Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-16 21:25 -0700
  Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 14:05 -0700
    Re: Indirect Bit ChrisQ <blackhole@devnull.com> - 2012-04-14 10:12 +0000
      Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-14 06:25 -0700
        Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-14 14:50 +0100
          Re: Indirect Bit ChrisQ <blackhole@devnull.com> - 2012-04-14 18:01 +0000
            Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-14 14:00 -0700
              Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-14 20:58 -0400
            Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 09:57 -0700
            Re: Indirect Bit timcaffrey@aol.com (Tim McCaffrey) - 2012-04-20 23:19 +0000
          Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 08:50 -0700
            Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-16 18:09 +0100
              Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-16 23:19 +0000
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-17 09:20 +0100
                Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-17 12:49 +0200
                Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-17 12:40 +0000
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-18 12:01 +0100
                Re: Indirect Bit anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2012-04-17 12:34 +0000
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-17 09:10 -0700
                Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-17 22:05 +0000
                Re: Indirect Bit jgk@panix.com (Joe keane) - 2012-04-19 19:37 +0000
                Re: Indirect Bit torbenm@diku.dk (Torben Ægidius Mogensen) - 2012-04-20 11:10 +0200
                Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-20 11:24 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 15:01 +0100
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 15:03 +0100
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-20 08:01 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 16:35 +0100
                Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-18 11:10 -0700
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-18 15:37 -0700
          Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-16 11:21 -0700
            Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-16 19:36 +0100
              Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-18 11:17 -0700
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-18 15:33 -0700
                Re: Indirect Bit Andreas Eder <andreas_eder@gmx.net> - 2012-04-19 00:29 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-19 10:50 +0100
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-19 11:29 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-19 21:39 +0100
                Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-20 15:14 -0400
                Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-20 22:43 -0700
                Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-21 17:14 -0400
                Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-21 19:47 -0500
                Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 10:45 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 09:57 +0100
                Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-22 12:54 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 13:00 +0100
                Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 13:28 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 13:04 +0100
                Re: Indirect Bit Fritz Wuehler <fritz@spamexpire-201204.rodent.frell.theremailer.net> - 2012-04-22 23:00 +0200
                Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-22 18:05 -0400
                Re: Indirect Bit glen herrmannsfeldt <gah@ugcs.caltech.edu> - 2012-04-22 23:20 +0000
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 08:22 +0100
                Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-22 03:56 -0700
                Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-22 12:28 -0400
                Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-22 12:56 -0500
                Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-22 13:15 -0700
                Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 22:30 +0200
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 21:40 +0100
                Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-22 17:15 -0500
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 08:26 +0100
                Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-23 08:02 -0700
                Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 17:02 +0100
                Re: Indirect Bit Fritz Wuehler <fritz@spamexpire-201204.rodent.frell.theremailer.net> - 2012-04-23 20:17 +0200
                Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-23 13:07 -0500
                Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-22 13:16 -0700
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-23 13:14 -0700
                Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-23 16:51 -0400
                Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-23 14:22 -0700
                Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-21 11:17 -0700
        Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-14 08:02 -0700

csiph-web