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| Message-ID | <4F84FB1E.6CD1FC88@sonic.net> (permalink) |
|---|---|
| Date | 2012-04-10 19:31 -0800 |
| From | Mark Thorson <nospam@sonic.net> |
| Organization | none |
| Newsgroups | comp.arch |
| Subject | Indirect Bit |
The PDP-10 and Nova had an indirect bit, in which a pointer had both an address and a bit to indicate whether the object being addressed was data or another pointer. On the PDP-10, the pointer was word length (36 bits) but addresses were only 18 bits, so there was plenty of room for the indirect bit, four register select bits (used for a base register), and a bunch of unused bits. On the Nova which was 16 bits, bit 0 was used, which took away the ability to address odd bytes (or it could have been used to double the address space, which would have meant a lot on the Nova). These machines had the peculiar feature that an instruction could execute for an indefinite number of cycles until the last pointer was found (indirect bit = 0). This allowed the CPU to run through linked lists without wasting instruction bandwidth and registers reading in the pointers so they can address memory. Now, with 64-bit architectures, there's a bunch of address bits nobody needs. How about taking A63 and using it as an indirect bit? That could extend the x86 architecture in a way that's software-compatible with the existing architecture. This gets really interesting if it's handled in the memory controller. When the CPU issues an address with A63 = 1, it falls through to the memory controller, which then reads the pointer from memory (or cache), checks the state of A63 on that pointer, and either fetches the data to return to the CPU or fetches another pointer. Of course, the pointers must contain virtual addresses, so the MC will have to have its own MMU and TLB. This offloads all of the messing around with pointers from the CPU bus, registers, cache, etc. If you do a lot of linked lists, this is an enormous win. What if you don't use linked lists? Lots of APIs are accessed through data structures for which the application has a handle (pointer to a pointer). For example, a communication channel might be controlled through a handle to a data structure that holds the channel's control and status bits and anything else it needs, like a pointer to a callback function. Driver libraries and layered communication protocols frequently use data structures that collect together all of the API stuff for a device or service. This form of access differs from the linked list in that you are only going two levels deep and you are applying an offset to the second level. That is, the object you want to access probably isn't the zeroth item in the data structure, so you need to apply an offset from the pointer. How does software specify this offset? Unless you're doing something stupid that wastes tons of address space, you don't need more than about 40 virtual address bits. In the future, no von Neumann architecture machine will ever need more than 52 address bits for a user application. If A51:A0 is the linear address, A52 is the user/kernel bit, and A63 is the indirect bit, that leaves 10 bits available to use for the offset into the data structure. That's enough to address a 1K data structure with byte granularity. All of the API data structures I've seen are much smaller than that, but if 64-bit word granularity is acceptable, the offset can be shifted by three bit positions to address 8K. These two forms of access can be served by one mechanism. The VA comes out of the CPU, then the MC cycles through one or more pointers and applies the offset (A62:A53) to the last pointer. Even linked lists can benefit from the offset, because the data in the referenced item probably resides at an offset from the pointer to that item. So why isn't this already being implemented? It relieves the biggest bottlenecks in the system -- CPU cache space, CPU instruction bandwidth, and CPU-cache bus bandwidth. Maybe it doesn't simulate well on typical applications, but typical applications aren't available that take advantage of it. You'd need to modify the compiler and recompile them to use the indirect bit and offset.
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Indirect Bit Mark Thorson <nospam@sonic.net> - 2012-04-10 19:31 -0800
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-11 01:29 -0500
Re: Indirect Bit sarr.blumson@alum.dartmouth.org - 2012-04-11 14:48 +0000
Re: Indirect Bit mac <acolvin@efunct.com> - 2012-04-12 14:43 +0000
Re: Indirect Bit Morten Reistad <first@last.name> - 2012-04-22 15:19 +0200
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-22 23:24 -0700
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-11 08:32 +0200
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-11 05:49 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:22 -0700
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-13 08:14 -0700
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 16:13 -0700
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-13 20:01 -0700
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-14 03:16 +0000
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-14 08:14 -0700
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 16:05 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-13 17:01 -0700
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-14 13:49 -0700
Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-13 20:07 -0400
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-14 18:47 +0200
Re: Indirect Bit Morten Reistad <first@last.name> - 2012-04-22 15:26 +0200
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-22 23:25 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 09:18 +0100
Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-23 19:35 -0400
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 08:37 +0100
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 09:42 +0100
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 01:58 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 11:26 +0100
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 05:02 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 13:58 +0100
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 10:07 -0700
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-24 04:30 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-24 13:01 +0100
Re: Indirect Bit Stefan Monnier <monnier@iro.umontreal.ca> - 2012-04-11 10:03 -0400
Re: Indirect Bit kenney@cix.compulink.co.uk - 2012-04-11 09:22 -0500
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 14:11 -0700
Re: Indirect Bit Stefan Monnier <monnier@iro.umontreal.ca> - 2012-04-12 18:05 -0400
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 20:13 -0700
Re: Indirect Bit Mark Thorson <nospam@sonic.net> - 2012-04-12 16:55 -0800
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 17:25 -0700
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-12 20:03 -0500
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:33 -0700
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-13 15:57 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-13 17:03 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 20:14 -0700
Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-11 10:35 -0400
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-11 08:54 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 07:55 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-12 10:16 -0700
Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-12 11:07 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:34 -0700
Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-12 11:35 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:41 -0700
Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-13 14:52 -0700
Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-15 09:24 -0700
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-15 22:45 +0200
Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-15 18:04 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-12 21:12 -0700
Re: Indirect Bit timcaffrey@aol.com (Tim McCaffrey) - 2012-04-12 19:23 +0000
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-13 08:54 +0200
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-14 14:37 -0700
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-15 23:42 +0000
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 08:08 -0700
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-16 23:38 +0000
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-16 21:29 -0700
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-16 21:25 -0700
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-12 14:05 -0700
Re: Indirect Bit ChrisQ <blackhole@devnull.com> - 2012-04-14 10:12 +0000
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-14 06:25 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-14 14:50 +0100
Re: Indirect Bit ChrisQ <blackhole@devnull.com> - 2012-04-14 18:01 +0000
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-14 14:00 -0700
Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-14 20:58 -0400
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 09:57 -0700
Re: Indirect Bit timcaffrey@aol.com (Tim McCaffrey) - 2012-04-20 23:19 +0000
Re: Indirect Bit "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-04-16 08:50 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-16 18:09 +0100
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-16 23:19 +0000
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-17 09:20 +0100
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-17 12:49 +0200
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-17 12:40 +0000
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-18 12:01 +0100
Re: Indirect Bit anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2012-04-17 12:34 +0000
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-17 09:10 -0700
Re: Indirect Bit Andrew Reilly <areilly.---@bigpond.net.au> - 2012-04-17 22:05 +0000
Re: Indirect Bit jgk@panix.com (Joe keane) - 2012-04-19 19:37 +0000
Re: Indirect Bit torbenm@diku.dk (Torben Ægidius Mogensen) - 2012-04-20 11:10 +0200
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-20 11:24 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 15:01 +0100
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 15:03 +0100
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-20 08:01 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-20 16:35 +0100
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-18 11:10 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-18 15:37 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-16 11:21 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-16 19:36 +0100
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-18 11:17 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-18 15:33 -0700
Re: Indirect Bit Andreas Eder <andreas_eder@gmx.net> - 2012-04-19 00:29 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-19 10:50 +0100
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-19 11:29 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-19 21:39 +0100
Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-20 15:14 -0400
Re: Indirect Bit "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-04-20 22:43 -0700
Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-21 17:14 -0400
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-21 19:47 -0500
Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 10:45 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 09:57 +0100
Re: Indirect Bit Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-04-22 12:54 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 13:00 +0100
Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 13:28 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 13:04 +0100
Re: Indirect Bit Fritz Wuehler <fritz@spamexpire-201204.rodent.frell.theremailer.net> - 2012-04-22 23:00 +0200
Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-22 18:05 -0400
Re: Indirect Bit glen herrmannsfeldt <gah@ugcs.caltech.edu> - 2012-04-22 23:20 +0000
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 08:22 +0100
Re: Indirect Bit Michael S <already5chosen@yahoo.com> - 2012-04-22 03:56 -0700
Re: Indirect Bit EricP <ThatWouldBeTelling@thevillage.com> - 2012-04-22 12:28 -0400
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-22 12:56 -0500
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-22 13:15 -0700
Re: Indirect Bit Nomen Nescio <nobody@dizum.com> - 2012-04-22 22:30 +0200
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-22 21:40 +0100
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-22 17:15 -0500
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 08:26 +0100
Re: Indirect Bit Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-04-23 08:02 -0700
Re: Indirect Bit nmm1@cam.ac.uk - 2012-04-23 17:02 +0100
Re: Indirect Bit Fritz Wuehler <fritz@spamexpire-201204.rodent.frell.theremailer.net> - 2012-04-23 20:17 +0200
Re: Indirect Bit Robert Wessel <robertwessel2@yahoo.com> - 2012-04-23 13:07 -0500
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-22 13:16 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-23 13:14 -0700
Re: Indirect Bit Anne & Lynn Wheeler <lynn@garlic.com> - 2012-04-23 16:51 -0400
Re: Indirect Bit Quadibloc <jsavard@ecn.ab.ca> - 2012-04-23 14:22 -0700
Re: Indirect Bit MitchAlsup <MitchAlsup@aol.com> - 2012-04-21 11:17 -0700
Re: Indirect Bit jacko <jackokring@gmail.com> - 2012-04-14 08:02 -0700
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