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Re: indexing register

Message-ID <4E597B7D.6030503@SPAM.comp-arch.net> (permalink)
Date 2011-08-27 18:19 -0500
From "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net>
Organization comp-arch.net
Newsgroups comp.arch
Subject Re: indexing register
References <j33jr6$e0g$1@reader1.panix.com> <771a70b7-04f0-4a4d-9f21-29534f085eea@glegroupsg2000goo.googlegroups.com>

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On 8/24/2011 8:44 PM, MitchAlsup wrote:
> A) In general, I am a fan of flat register files and in particular when implementing SPARC V8s and V9s found that the windowed register files were a performance impediment and not a performance adder.
>
> B) Given that you have the ability to make such a large register file without harming performance (see A above) It is my considered opinion that you would get more performance by sharing that file across several threads than by adding registers to a single context.
>
> C) Can anyone name a machine with that 'took the performance world by storm' and also used more than 5-bits to index the register file(s)? {Note this wording expressively allows the CRAY 1 in because it indexes its register files with only 3-bits.}
>
> Mitch

Urgh. This on a plane with a pan. Can't google to check, but:

  I think I just read that the Fujitsu K-seriesis at the top of the 
supercomputer TOP 5000 list - or was recently.

  I am not sure, and can't google on plane, but think this uses the 
Fujitsu SPARC 64 with the HPC ACE sIMD instructionset extensions.

  256 FP and SIMD registers. Flat?

32+32 int.

The 256 registers required 8 bit register numbers that did not fit in 
SPARC's existing 32 bit instructions, so Fujitsu added an extension 
prefix instruction SXAR.	

  (TBD: write an article about the difference between extensions that 
are "pasted" to the instructions they extend, and extensions that set 
architectural registers that extend fields).

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Thread

indexing register Joe Keane <jgk@jgk.org> - 2011-08-24 19:36 +0000
  Re: indexing register Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-24 13:38 -0700
  Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-24 18:44 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-24 22:24 -0400
      Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:08 -0700
        Re: indexing register Quadibloc <jsavard@ecn.ab.ca> - 2011-08-24 20:16 -0700
      Re: indexing register Thomas Womack <twomack@chiark.greenend.org.uk> - 2011-08-25 11:05 +0100
    Re: indexing register nmm1@cam.ac.uk - 2011-08-25 08:29 +0100
    Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-26 13:42 -0700
      Re: indexing register EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-26 19:32 -0400
      Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 18:53 -0500
        Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-26 20:46 -0400
          Re: indexing register Robert Wessel <robertwessel2@yahoo.com> - 2011-08-26 23:34 -0500
            Re: indexing register mac <acolvin@efunct.com> - 2011-08-28 17:23 +0000
          Re: indexing register MitchAlsup <MitchAlsup@aol.com> - 2011-08-27 14:10 -0700
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 18:19 -0500
    Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-27 20:39 -0500
      Re: indexing register "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-28 20:59 -0700
    Re: indexing register jgk@panix.com (Joe keane) - 2011-08-29 21:59 +0000
  Re: indexing register Bakul Shah <usenet@bitblocks.com> - 2011-08-25 22:46 -0700
    Re: indexing register mac <acolvin@efunct.com> - 2011-08-26 14:06 +0000

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