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Groups > comp.lang.forth > #49688
| From | Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> |
|---|---|
| Newsgroups | comp.lang.forth |
| Subject | Re: Forth in VHDL |
| Date | 2016-07-30 16:40 +0100 |
| Organization | A noiseless patient Spider |
| Message-ID | <20160730164008.3f46a711@HP-6550b> (permalink) |
| References | <nn3ti7$hte$1@dont-email.me> <75a5e2b8-5d09-4f7d-b0b5-0ca36a019752@googlegroups.com> |
On Mon, 25 Jul 2016 05:57:16 -0700 (PDT) JUERGEN <epldfpga@aol.com> wrote: > Forth to Gates - I had a discussion with Ian page last year - > he developed C to gates in Oxford if I remember correctly. The > product route: Handel-C - then ESL then Celoxica then Mentor. > If you can do C to Gates - Forth to Gates should be easier? > > He stated it should not be too difficult and said: > > "I am willing to give advice, however I’ve been out of > academia for 14 years now - and haven’t written a program in > any language in all that time! Apparently he has not missed much! Saw this in c.a.fpga fro someone who likely knows not to speak out of line: From: Kevin Neilson <kevin.neilson@xilinx.com> Subject: Mod-24: The State of High-Level Synthesis in 2016 Date: Fri, 22 Jul 2016 09:43:24 -0700 (PDT) User-Agent: G2/1.0 Newsgroups: comp.arch.fpga It's 2016 and I still have to write out most of my code at very low levels of abstraction like I did ten years ago. Whenever I hear about a new tool that supposedly converts C to gates, I don't even look into it, because I can't even get Verilog to synth properly. My latest example: I needed to reduce an 12-bit number, mod-24. [...] There are a further 20+ more posts exploring this problem. Jan Coombs --
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Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 22:29 -0400
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:01 -0400
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-24 23:05 -0400
Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 22:25 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 00:08 -0400
Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 23:57 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:22 -0400
Re: Forth in VHDL Paul Rubin <no.email@nospam.invalid> - 2016-07-24 22:38 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 01:53 -0400
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:31 -0700
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:36 -0700
Re: Forth in VHDL Richard Owlett <rowlett@cloud85.net> - 2016-07-25 08:14 -0500
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 07:37 -0700
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 08:01 -0700
Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 14:11 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 17:39 -0400
Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-25 18:01 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 19:40 -0400
Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-26 11:04 +0100
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 11:13 -0400
Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-26 16:00 +0000
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 12:58 -0400
Re: Forth in VHDL anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2016-07-27 09:39 +0000
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 10:01 -0400
Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-27 22:46 +0100
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-26 09:43 -0700
Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-28 09:12 +0100
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 05:04 -0400
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-28 07:56 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 13:04 -0400
Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-08-02 12:21 +0100
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-28 08:02 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 18:15 -0400
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-28 15:19 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-31 18:43 -0400
Re: Forth in VHDL Paul Rubin <no.email@nospam.invalid> - 2016-07-31 17:10 -0700
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-24 20:08 -0700
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-24 20:33 -0700
Re: Forth in VHDL Cecil Bayona <cbayona@cbayona.com> - 2016-07-24 22:58 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 00:17 -0400
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 10:02 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 14:13 -0400
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 14:17 -0400
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 15:04 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 19:28 -0400
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-25 17:20 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-25 23:07 -0400
Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-26 03:07 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-26 13:05 -0400
Re: Forth in VHDL Brad Eckert <hwfwguy@gmail.com> - 2016-07-26 16:22 -0700
Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 03:57 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 10:34 -0400
Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 11:15 -0500
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-27 12:51 -0400
Re: Forth in VHDL Andrew Haley <andrew29@littlepinkcloud.invalid> - 2016-07-27 16:12 -0500
Re: Forth in VHDL "Elizabeth D. Rather" <erather@forth.com> - 2016-07-27 12:43 -1000
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 00:40 -0400
Re: Forth in VHDL hughaguilar96@gmail.com - 2016-08-02 22:45 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-28 00:39 -0400
Re: Forth in VHDL wzab01@gmail.com - 2016-07-25 01:48 -0700
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 05:57 -0700
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-07-25 06:02 -0700
Re: Forth in VHDL Jan Coombs <jenfhaomndgfwutc@murmic.plus.com> - 2016-07-30 16:40 +0100
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-08-01 08:58 -0700
Re: Forth in VHDL rickman <gnuarm@gmail.com> - 2016-07-31 17:10 -0400
Re: Forth in VHDL JUERGEN <epldfpga@aol.com> - 2016-08-01 09:02 -0700
Re: Forth in VHDL Ilya Tarasov <ilya74.tarasov@gmail.com> - 2016-07-29 05:42 -0700
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