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| Started by | Vignesh R <vigneshr@ti.com> |
|---|---|
| First post | 2017-09-24 13:10 +0200 |
| Last post | 2017-09-24 15:20 +0200 |
| Articles | 8 — 3 participants |
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[PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Vignesh R <vigneshr@ti.com> - 2017-09-24 13:10 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Marek Vasut <marek.vasut@gmail.com> - 2017-09-24 14:20 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Marek Vasut <marek.vasut@gmail.com> - 2017-09-24 15:20 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Vignesh R <vigneshr@ti.com> - 2017-09-24 15:30 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Marek Vasut <marek.vasut@gmail.com> - 2017-09-24 16:00 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support matthew.gerlach@linux.intel.com - 2017-09-26 00:50 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Marek Vasut <marek.vasut@gmail.com> - 2017-09-26 02:00 +0200
Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Vignesh R <vigneshr@ti.com> - 2017-09-24 15:20 +0200
| From | Vignesh R <vigneshr@ti.com> |
|---|---|
| Date | 2017-09-24 13:10 +0200 |
| Subject | [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <utcXo-7Yz-7@gated-at.bofh.it> |
Add pm_runtime* calls to cadence-quadspi driver. This is required to
switch on QSPI power domain on TI 66AK2G SoC during probe.
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index d9629e8f4798..2c8e6226d267 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -31,6 +31,7 @@
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/sched.h>
#include <linux/spi/spi.h>
#include <linux/timer.h>
@@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev)
return -ENXIO;
}
+ pm_runtime_enable(&pdev->dev);
+ ret = pm_runtime_get_sync(&pdev->dev);
+ if (ret < 0) {
+ pm_runtime_put_noidle(&pdev->dev);
+ return ret;
+ }
+
ret = clk_prepare_enable(cqspi->clk);
if (ret) {
dev_err(dev, "Cannot enable QSPI clock.\n");
@@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev)
clk_disable_unprepare(cqspi->clk);
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
return 0;
}
--
2.14.1
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| From | Marek Vasut <marek.vasut@gmail.com> |
|---|---|
| Date | 2017-09-24 14:20 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <ute38-as-7@gated-at.bofh.it> |
| In reply to | #1738146 |
On 09/24/2017 12:59 PM, Vignesh R wrote:
> Add pm_runtime* calls to cadence-quadspi driver. This is required to
> switch on QSPI power domain on TI 66AK2G SoC during probe.
>
> Signed-off-by: Vignesh R <vigneshr@ti.com>
Are you planning to add some more fine-grained PM control later?
> ---
> drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
> index d9629e8f4798..2c8e6226d267 100644
> --- a/drivers/mtd/spi-nor/cadence-quadspi.c
> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c
> @@ -31,6 +31,7 @@
> #include <linux/of_device.h>
> #include <linux/of.h>
> #include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> #include <linux/sched.h>
> #include <linux/spi/spi.h>
> #include <linux/timer.h>
> @@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev)
> return -ENXIO;
> }
>
> + pm_runtime_enable(&pdev->dev);
> + ret = pm_runtime_get_sync(&pdev->dev);
> + if (ret < 0) {
> + pm_runtime_put_noidle(&pdev->dev);
> + return ret;
> + }
> +
> ret = clk_prepare_enable(cqspi->clk);
> if (ret) {
> dev_err(dev, "Cannot enable QSPI clock.\n");
> @@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev)
>
> clk_disable_unprepare(cqspi->clk);
>
> + pm_runtime_put_sync(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> +
> return 0;
> }
>
>
--
Best regards,
Marek Vasut
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| From | Marek Vasut <marek.vasut@gmail.com> |
|---|---|
| Date | 2017-09-24 15:20 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <uteZc-JV-1@gated-at.bofh.it> |
| In reply to | #1738175 |
On 09/24/2017 03:08 PM, Vignesh R wrote: > > > On 9/24/2017 5:31 PM, Marek Vasut wrote: >> On 09/24/2017 12:59 PM, Vignesh R wrote: >>> Add pm_runtime* calls to cadence-quadspi driver. This is required to >>> switch on QSPI power domain on TI 66AK2G SoC during probe. >>> >>> Signed-off-by: Vignesh R <vigneshr@ti.com> >> >> Are you planning to add some more fine-grained PM control later? > > Yes, I will need to add fine-grained PM control at some point. But, for > now SoC does not really support low power mode or runtime power saving > option. > The fact that driver still uses clk_prepare_*() calls to enable/disable > clocks instead of pm_*() calls makes it a bit tricky though. > > Just figured out I forgot to add cleanup code in error handling path of > probe(). Will fix that and send a v4. OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM either, so it's fine for now. -- Best regards, Marek Vasut
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| From | Vignesh R <vigneshr@ti.com> |
|---|---|
| Date | 2017-09-24 15:30 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <utf8R-N4-7@gated-at.bofh.it> |
| In reply to | #1738183 |
On 9/24/2017 6:42 PM, Marek Vasut wrote: > On 09/24/2017 03:08 PM, Vignesh R wrote: >> >> >> On 9/24/2017 5:31 PM, Marek Vasut wrote: >>> On 09/24/2017 12:59 PM, Vignesh R wrote: >>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to >>>> switch on QSPI power domain on TI 66AK2G SoC during probe. >>>> >>>> Signed-off-by: Vignesh R <vigneshr@ti.com> >>> >>> Are you planning to add some more fine-grained PM control later? >> >> Yes, I will need to add fine-grained PM control at some point. But, for >> now SoC does not really support low power mode or runtime power saving >> option. >> The fact that driver still uses clk_prepare_*() calls to enable/disable >> clocks instead of pm_*() calls makes it a bit tricky though. >> >> Just figured out I forgot to add cleanup code in error handling path of >> probe(). Will fix that and send a v4. > > OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM > either, so it's fine for now. > Ok thanks! Do you know if pm_runtime_get_sync() can enable clocks for QSPI on SoCFPGA or if clk_prepare_enable() is needed? Just trying to see if its possible to get rid of clk_*() calls in favor of pm_*() calls.
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| From | Marek Vasut <marek.vasut@gmail.com> |
|---|---|
| Date | 2017-09-24 16:00 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <utfBU-Wx-17@gated-at.bofh.it> |
| In reply to | #1738188 |
On 09/24/2017 03:27 PM, Vignesh R wrote: > > > On 9/24/2017 6:42 PM, Marek Vasut wrote: >> On 09/24/2017 03:08 PM, Vignesh R wrote: >>> >>> >>> On 9/24/2017 5:31 PM, Marek Vasut wrote: >>>> On 09/24/2017 12:59 PM, Vignesh R wrote: >>>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to >>>>> switch on QSPI power domain on TI 66AK2G SoC during probe. >>>>> >>>>> Signed-off-by: Vignesh R <vigneshr@ti.com> >>>> >>>> Are you planning to add some more fine-grained PM control later? >>> >>> Yes, I will need to add fine-grained PM control at some point. But, for >>> now SoC does not really support low power mode or runtime power saving >>> option. >>> The fact that driver still uses clk_prepare_*() calls to enable/disable >>> clocks instead of pm_*() calls makes it a bit tricky though. >>> >>> Just figured out I forgot to add cleanup code in error handling path of >>> probe(). Will fix that and send a v4. >> >> OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM >> either, so it's fine for now. >> > > Ok thanks! Do you know if pm_runtime_get_sync() can enable clocks for > QSPI on SoCFPGA or if clk_prepare_enable() is needed? Just trying to see > if its possible to get rid of clk_*() calls in favor of pm_*() calls. Not of the top of my head, sorry. +CC Matthew, he should know. -- Best regards, Marek Vasut
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| From | matthew.gerlach@linux.intel.com |
|---|---|
| Date | 2017-09-26 00:50 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <utKmm-4iS-5@gated-at.bofh.it> |
| In reply to | #1738190 |
On Sun, 24 Sep 2017, Marek Vasut wrote: > On 09/24/2017 03:27 PM, Vignesh R wrote: >> >> >> On 9/24/2017 6:42 PM, Marek Vasut wrote: >>> On 09/24/2017 03:08 PM, Vignesh R wrote: >>>> >>>> >>>> On 9/24/2017 5:31 PM, Marek Vasut wrote: >>>>> On 09/24/2017 12:59 PM, Vignesh R wrote: >>>>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to >>>>>> switch on QSPI power domain on TI 66AK2G SoC during probe. >>>>>> >>>>>> Signed-off-by: Vignesh R <vigneshr@ti.com> >>>>> >>>>> Are you planning to add some more fine-grained PM control later? >>>> >>>> Yes, I will need to add fine-grained PM control at some point. But, for >>>> now SoC does not really support low power mode or runtime power saving >>>> option. >>>> The fact that driver still uses clk_prepare_*() calls to enable/disable >>>> clocks instead of pm_*() calls makes it a bit tricky though. >>>> >>>> Just figured out I forgot to add cleanup code in error handling path of >>>> probe(). Will fix that and send a v4. >>> >>> OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM >>> either, so it's fine for now. >>> >> >> Ok thanks! Do you know if pm_runtime_get_sync() can enable clocks for >> QSPI on SoCFPGA or if clk_prepare_enable() is needed? Just trying to see >> if its possible to get rid of clk_*() calls in favor of pm_*() calls. > > Not of the top of my head, sorry. +CC Matthew, he should know. I am not an expert at the clock framework nor the power management, but I did ask around a bit. No one I asked was planning to change the clk_*() calls to pm_*() call, but the feedback was that it would be a good idea. Matthew Gerlach > > -- > Best regards, > Marek Vasut >
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| From | Marek Vasut <marek.vasut@gmail.com> |
|---|---|
| Date | 2017-09-26 02:00 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <utLs6-51O-3@gated-at.bofh.it> |
| In reply to | #1739321 |
On 09/26/2017 12:41 AM, matthew.gerlach@linux.intel.com wrote: > > > On Sun, 24 Sep 2017, Marek Vasut wrote: > >> On 09/24/2017 03:27 PM, Vignesh R wrote: >>> >>> >>> On 9/24/2017 6:42 PM, Marek Vasut wrote: >>>> On 09/24/2017 03:08 PM, Vignesh R wrote: >>>>> >>>>> >>>>> On 9/24/2017 5:31 PM, Marek Vasut wrote: >>>>>> On 09/24/2017 12:59 PM, Vignesh R wrote: >>>>>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to >>>>>>> switch on QSPI power domain on TI 66AK2G SoC during probe. >>>>>>> >>>>>>> Signed-off-by: Vignesh R <vigneshr@ti.com> >>>>>> >>>>>> Are you planning to add some more fine-grained PM control later? >>>>> >>>>> Yes, I will need to add fine-grained PM control at some point. But, >>>>> for >>>>> now SoC does not really support low power mode or runtime power saving >>>>> option. >>>>> The fact that driver still uses clk_prepare_*() calls to >>>>> enable/disable >>>>> clocks instead of pm_*() calls makes it a bit tricky though. >>>>> >>>>> Just figured out I forgot to add cleanup code in error handling >>>>> path of >>>>> probe(). Will fix that and send a v4. >>>> >>>> OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM >>>> either, so it's fine for now. >>>> >>> >>> Ok thanks! Do you know if pm_runtime_get_sync() can enable clocks for >>> QSPI on SoCFPGA or if clk_prepare_enable() is needed? Just trying to see >>> if its possible to get rid of clk_*() calls in favor of pm_*() calls. >> >> Not of the top of my head, sorry. +CC Matthew, he should know. > > I am not an expert at the clock framework nor the power management, but I > did ask around a bit. No one I asked was planning to change the clk_*() > calls to pm_*() call, but the feedback was that it would be a good idea. The question is, if we do the replacement, will it break on socfpga ? A quick test might be useful. -- Best regards, Marek Vasut
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| From | Vignesh R <vigneshr@ti.com> |
|---|---|
| Date | 2017-09-24 15:20 +0200 |
| Subject | Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support |
| Message-ID | <uteZc-JV-3@gated-at.bofh.it> |
| In reply to | #1738175 |
On 9/24/2017 5:31 PM, Marek Vasut wrote:
> On 09/24/2017 12:59 PM, Vignesh R wrote:
>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>
> Are you planning to add some more fine-grained PM control later?
Yes, I will need to add fine-grained PM control at some point. But, for
now SoC does not really support low power mode or runtime power saving
option.
The fact that driver still uses clk_prepare_*() calls to enable/disable
clocks instead of pm_*() calls makes it a bit tricky though.
Just figured out I forgot to add cleanup code in error handling path of
probe(). Will fix that and send a v4.
>
>> ---
>> drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
>> index d9629e8f4798..2c8e6226d267 100644
>> --- a/drivers/mtd/spi-nor/cadence-quadspi.c
>> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c
>> @@ -31,6 +31,7 @@
>> #include <linux/of_device.h>
>> #include <linux/of.h>
>> #include <linux/platform_device.h>
>> +#include <linux/pm_runtime.h>
>> #include <linux/sched.h>
>> #include <linux/spi/spi.h>
>> #include <linux/timer.h>
>> @@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev)
>> return -ENXIO;
>> }
>>
>> + pm_runtime_enable(&pdev->dev);
>> + ret = pm_runtime_get_sync(&pdev->dev);
>> + if (ret < 0) {
>> + pm_runtime_put_noidle(&pdev->dev);
>> + return ret;
>> + }
>> +
>> ret = clk_prepare_enable(cqspi->clk);
>> if (ret) {
>> dev_err(dev, "Cannot enable QSPI clock.\n");
>> @@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev)
>>
>> clk_disable_unprepare(cqspi->clk);
>>
>> + pm_runtime_put_sync(&pdev->dev);
>> + pm_runtime_disable(&pdev->dev);
>> +
>> return 0;
>> }
>>
>>
>
>
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