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| Started by | Brian Norris <briannorris@chromium.org> |
|---|---|
| First post | 2016-10-04 20:20 +0200 |
| Last post | 2016-10-13 12:30 +0200 |
| Articles | 5 — 3 participants |
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[PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend Brian Norris <briannorris@chromium.org> - 2016-10-04 20:20 +0200
[PATCH v2 2/2] arm64: dts: rockchip: arch counter doesn't tick in system suspend Brian Norris <briannorris@chromium.org> - 2016-10-04 20:20 +0200
Re: [PATCH v2 2/2] arm64: dts: rockchip: arch counter doesn't tick in system suspend Doug Anderson <dianders@chromium.org> - 2016-10-05 00:20 +0200
Re: [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend Doug Anderson <dianders@chromium.org> - 2016-10-05 00:20 +0200
Re: [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend Marc Zyngier <marc.zyngier@arm.com> - 2016-10-13 12:30 +0200
| From | Brian Norris <briannorris@chromium.org> |
|---|---|
| Date | 2016-10-04 20:20 +0200 |
| Subject | [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend |
| Message-ID | <soCtP-6h4-1@gated-at.bofh.it> |
The ARM ARM specifies that the system counter "must be implemented in an
always-on power domain," and so we try to use the counter as a source of
timekeeping across suspend/resume. Unfortunately, some SoCs (e.g.,
Rockchip's RK3399) do not keep the counter ticking properly when
switched from their high-power clock to the lower-power clock used in
system suspend. Support this quirk by adding a new device tree property.
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
v2:
* add new device tree property, instead of re-using the "always-on"
property (which has different meaning)
Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++
drivers/clocksource/arm_arch_timer.c | 9 ++++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index ef5fbe9a77c7..ad440a2b8051 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -38,6 +38,11 @@ to deliver its interrupts via SPIs.
architecturally-defined reset values. Only supported for 32-bit
systems which follow the ARMv7 architected reset values.
+- arm,no-tick-in-suspend : The main counter does not tick when the system is in
+ low-power system suspend on some SoCs. This behavior does not match the
+ Architecture Reference Manual's specification that the system counter "must
+ be implemented in an always-on power domain."
+
Example:
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 73c487da6d2a..a2503db7e533 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt;
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
static bool arch_timer_c3stop;
static bool arch_timer_mem_use_virtual;
+static bool arch_counter_suspend_stop;
static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
@@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = {
.rating = 400,
.read = arch_counter_read,
.mask = CLOCKSOURCE_MASK(56),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static struct cyclecounter cyclecounter = {
@@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type)
arch_timer_read_counter = arch_counter_get_cntvct_mem;
}
+ if (!arch_counter_suspend_stop)
+ clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
start_count = arch_timer_read_counter();
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
cyclecounter.mult = clocksource_counter.mult;
@@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np)
of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
arch_timer_uses_ppi = PHYS_SECURE_PPI;
+ /* On some systems, the counter stops ticking when in suspend. */
+ arch_counter_suspend_stop = of_property_read_bool(np,
+ "arm,no-tick-in-suspend");
+
return arch_timer_init();
}
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
--
2.8.0.rc3.226.g39d4020
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| From | Brian Norris <briannorris@chromium.org> |
|---|---|
| Date | 2016-10-04 20:20 +0200 |
| Subject | [PATCH v2 2/2] arm64: dts: rockchip: arch counter doesn't tick in system suspend |
| Message-ID | <soCtP-6h4-13@gated-at.bofh.it> |
| In reply to | #1495546 |
The "arm,no-tick-in-suspend" property was introduced to note
implementations where the system counter does not quite follow the ARM
specification that it "must be implemented in an always-on power
domain".
Particularly, RK3399's counter stops ticking when we switch from the
24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as
such.
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
v2: new in v2
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 76b28649f0b0..401c8be8c8ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -174,6 +174,7 @@
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
+ arm,no-tick-in-suspend;
};
xin24m: xin24m {
--
2.8.0.rc3.226.g39d4020
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| From | Doug Anderson <dianders@chromium.org> |
|---|---|
| Date | 2016-10-05 00:20 +0200 |
| Subject | Re: [PATCH v2 2/2] arm64: dts: rockchip: arch counter doesn't tick in system suspend |
| Message-ID | <soGe6-jc-9@gated-at.bofh.it> |
| In reply to | #1495550 |
Hi, On Tue, Oct 4, 2016 at 11:12 AM, Brian Norris <briannorris@chromium.org> wrote: > The "arm,no-tick-in-suspend" property was introduced to note > implementations where the system counter does not quite follow the ARM > specification that it "must be implemented in an always-on power > domain". > > Particularly, RK3399's counter stops ticking when we switch from the > 24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as > such. > > Signed-off-by: Brian Norris <briannorris@chromium.org> > --- > v2: new in v2 > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Douglas Anderson <dianders@chromium.org>
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| From | Doug Anderson <dianders@chromium.org> |
|---|---|
| Date | 2016-10-05 00:20 +0200 |
| Subject | Re: [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend |
| Message-ID | <soGe6-jc-7@gated-at.bofh.it> |
| In reply to | #1495546 |
Hi, On Tue, Oct 4, 2016 at 11:12 AM, Brian Norris <briannorris@chromium.org> wrote: > The ARM ARM specifies that the system counter "must be implemented in an > always-on power domain," and so we try to use the counter as a source of > timekeeping across suspend/resume. Unfortunately, some SoCs (e.g., > Rockchip's RK3399) do not keep the counter ticking properly when > switched from their high-power clock to the lower-power clock used in > system suspend. Support this quirk by adding a new device tree property. > > Signed-off-by: Brian Norris <briannorris@chromium.org> > --- > v2: > * add new device tree property, instead of re-using the "always-on" > property (which has different meaning) > > Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++ > drivers/clocksource/arm_arch_timer.c | 9 ++++++++- > 2 files changed, 13 insertions(+), 1 deletion(-) FWIW: Reviewed-by: Douglas Anderson <dianders@chromium.org>
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| From | Marc Zyngier <marc.zyngier@arm.com> |
|---|---|
| Date | 2016-10-13 12:30 +0200 |
| Subject | Re: [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend |
| Message-ID | <srLqW-2eM-33@gated-at.bofh.it> |
| In reply to | #1495546 |
On Tue, 4 Oct 2016 11:12:09 -0700 Brian Norris <briannorris@chromium.org> wrote: > The ARM ARM specifies that the system counter "must be implemented in an > always-on power domain," and so we try to use the counter as a source of > timekeeping across suspend/resume. Unfortunately, some SoCs (e.g., > Rockchip's RK3399) do not keep the counter ticking properly when > switched from their high-power clock to the lower-power clock used in > system suspend. Support this quirk by adding a new device tree property. > > Signed-off-by: Brian Norris <briannorris@chromium.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> M. -- Jazz is not dead. It just smells funny.
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