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Groups > linux.kernel > #1257417 > unrolled thread

[PATCH v7 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support

Started byHan Xu <b45815@freescale.com>
First post2015-10-27 23:20 +0100
Last post2015-10-31 02:40 +0100
Articles 5 — 4 participants

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  [PATCH v7 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support Han Xu <b45815@freescale.com> - 2015-10-27 23:20 +0100
    Re: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode Fabio Estevam <festevam@gmail.com> - 2015-10-28 00:30 +0100
    Re: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support Andy Shevchenko <andy.shevchenko@gmail.com> - 2015-10-29 22:10 +0100
      Re: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support Andy Shevchenko <andy.shevchenko@gmail.com> - 2015-10-29 22:20 +0100
    Re: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode Vinod Koul <vinod.koul@intel.com> - 2015-10-31 02:40 +0100

#1257417 — [PATCH v7 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support

FromHan Xu <b45815@freescale.com>
Date2015-10-27 23:20 +0100
Subject[PATCH v7 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support
Message-ID<qokL0-2rO-19@gated-at.bofh.it>
v1 ---> v2
change the erased page bitflip threshold to ecc strength in bitflip patch

v2 ---> v3
remove unnecessary function in mxs-dma
change the log message when legacy_set_geometry failed fix the comment message for bitflip add comma for all field entries

v3 ---> v4
code style change for indentation

v4 ---> v5
split the DMA PM and i.MX7D support into two patches add more comments fix the DMA clock count mismatch issue for i.MX7D

v5 ---> v6
add a sentinel entry for of_device_id to fix build error

v6 ---> v7
add CONFIG_PM_SLEEP for GPMI/DMA PM code.

Adrian Alonso (1):
  dmaengine: mxs: add i.MX7D APBH DMA support

Han Xu (4):
  mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NAND
  mtd: nand: gpmi: add GPMI NAND support for i.MX7D
  mtd: nand: gpmi: correct bitflip for erased NAND page
  mtd: nand: gpmi: support NAND on i.MX6UL

Huang Shijie (2):
  mtd: nand: gpmi: add gpmi dsm supend/resume support
  dmaengine: mxs: APBH DMA supports deep sleep mode

 drivers/dma/mxs-dma.c                  |  74 ++++++++++++++++--
 drivers/mtd/nand/gpmi-nand/bch-regs.h  |  24 ++++--
 drivers/mtd/nand/gpmi-nand/gpmi-lib.c  |  15 +++-
 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 133 ++++++++++++++++++++++++++++-----
 drivers/mtd/nand/gpmi-nand/gpmi-nand.h |  14 +++-
 5 files changed, 219 insertions(+), 41 deletions(-)

-- 
1.9.1

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#1257471 — Re: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode

FromFabio Estevam <festevam@gmail.com>
Date2015-10-28 00:30 +0100
SubjectRe: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode
Message-ID<qolQK-37m-13@gated-at.bofh.it>
In reply to#1257417
On Tue, Oct 27, 2015 at 8:05 PM, Han Xu <b45815@freescale.com> wrote:
> From: Huang Shijie <b32955@freescale.com>
>
> Deep Sleep Mode(dsm) turns off the power for APBH DMA module, DMA
> need to be re-initialized when system resumed back.
>
> Signed-off-by: Huang Shijie <b32955@freescale.com>

Huang's FSL address is no longer valid.
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#1259006 — Re: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2015-10-29 22:10 +0100
SubjectRe: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support
Message-ID<qp2Cl-5oO-3@gated-at.bofh.it>
In reply to#1257417
On Wed, Oct 28, 2015 at 12:05 AM, Han Xu <b45815@freescale.com> wrote:
> From: Adrian Alonso <aalonso@freescale.com>
>
> supports APBH DMA on i.MX7D by add extra clock clk_io

[]

>  MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);
> @@ -440,6 +448,13 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
>         if (ret)
>                 goto err_clk;
>
> +       /* enable the extra clk_io clock for i.MX7D */
> +       if (mxs_dma->dev_id == IMX7D_DMA) {
> +               ret = clk_prepare_enable(mxs_dma->clk_io);
> +               if (ret)
> +                       goto err_clk_unprepare;

Perhaps err_clk.

> +       }
> +
>         mxs_dma_reset_chan(chan);
>
>         dma_async_tx_descriptor_init(&mxs_chan->desc, chan);
> @@ -450,6 +465,8 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
>
>         return 0;
>
> +err_clk_unprepare:
> +       clk_disable_unprepare(mxs_dma->clk);
>  err_clk:
>         free_irq(mxs_chan->chan_irq, mxs_dma);
>  err_irq:
> @@ -471,6 +488,9 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan)
>         dma_free_coherent(mxs_dma->dma_device.dev, CCW_BLOCK_SIZE,
>                         mxs_chan->ccw, mxs_chan->ccw_phys);
>
> +       if (mxs_dma->dev_id == IMX7D_DMA)
> +               clk_disable_unprepare(mxs_dma->clk_io);
> +
>         clk_disable_unprepare(mxs_dma->clk);
>  }
>
> @@ -701,9 +721,15 @@ static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)
>         if (ret)
>                 return ret;
>
> +       if (mxs_dma->dev_id == IMX7D_DMA) {
> +               ret = clk_prepare_enable(mxs_dma->clk_io);
> +               if (ret)
> +                       goto err_clk_bch;
> +       }
> +
>         ret = stmp_reset_block(mxs_dma->base);
>         if (ret)
> -               goto err_out;
> +               goto err_clk_io;
>
>         /* enable apbh burst */
>         if (dma_is_apbh(mxs_dma)) {
> @@ -717,7 +743,10 @@ static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)
>         writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
>                 mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);
>
> -err_out:
> +err_clk_io:
> +       if (mxs_dma->dev_id == IMX7D_DMA)
> +               clk_disable_unprepare(mxs_dma->clk_io);
> +err_clk_bch:
>         clk_disable_unprepare(mxs_dma->clk);
>         return ret;
>  }
> @@ -803,9 +832,19 @@ static int __init mxs_dma_probe(struct platform_device *pdev)
>         if (IS_ERR(mxs_dma->base))
>                 return PTR_ERR(mxs_dma->base);
>
> -       mxs_dma->clk = devm_clk_get(&pdev->dev, NULL);
> -       if (IS_ERR(mxs_dma->clk))
> -               return PTR_ERR(mxs_dma->clk);
> +       if (mxs_dma->dev_id == IMX7D_DMA) {
> +               mxs_dma->clk = devm_clk_get(&pdev->dev, "dma_apbh_bch");
> +               if (IS_ERR(mxs_dma->clk))
> +                       return PTR_ERR(mxs_dma->clk);
> +               mxs_dma->clk_io = devm_clk_get(&pdev->dev, "dma_apbh_io");
> +               if (IS_ERR(mxs_dma->clk_io))
> +                       return PTR_ERR(mxs_dma->clk_io);
> +

Redundant empty line.

> +       } else {
> +               mxs_dma->clk = devm_clk_get(&pdev->dev, NULL);
> +               if (IS_ERR(mxs_dma->clk))
> +                       return PTR_ERR(mxs_dma->clk);
> +       }



-- 
With Best Regards,
Andy Shevchenko
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#1259011 — Re: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2015-10-29 22:20 +0100
SubjectRe: [PATCH v7 3/7] dmaengine: mxs: add i.MX7D APBH DMA support
Message-ID<qp2M2-5rW-9@gated-at.bofh.it>
In reply to#1259006
On Thu, Oct 29, 2015 at 11:03 PM, Han Xu <han.xu@freescale.com> wrote:
> On Thu, Oct 29, 2015 at 11:08:10PM +0200, Andy Shevchenko wrote:
>> On Wed, Oct 28, 2015 at 12:05 AM, Han Xu <b45815@freescale.com> wrote:
>> > From: Adrian Alonso <aalonso@freescale.com>
>> >
>> > supports APBH DMA on i.MX7D by add extra clock clk_io
>>
>> []
>>
>> >  MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);
>> > @@ -440,6 +448,13 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
>> >         if (ret)
>> >                 goto err_clk;
>> >
>> > +       /* enable the extra clk_io clock for i.MX7D */
>> > +       if (mxs_dma->dev_id == IMX7D_DMA) {
>> > +               ret = clk_prepare_enable(mxs_dma->clk_io);
>> > +               if (ret)
>> > +                       goto err_clk_unprepare;
>>
>> Perhaps err_clk.
>>
> it is err_clk_unprepare

Ah, you are right.

>> > +       }
>> > +
>> >         mxs_dma_reset_chan(chan);
>> >
>> >         dma_async_tx_descriptor_init(&mxs_chan->desc, chan);
>> > @@ -450,6 +465,8 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
>> >
>> >         return 0;
>> >
>> > +err_clk_unprepare:
>> > +       clk_disable_unprepare(mxs_dma->clk);
>> >  err_clk:
>> >         free_irq(mxs_chan->chan_irq, mxs_dma);


-- 
With Best Regards,
Andy Shevchenko
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#1259889 — Re: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode

FromVinod Koul <vinod.koul@intel.com>
Date2015-10-31 02:40 +0100
SubjectRe: [PATCH v7 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode
Message-ID<qptjb-4SL-1@gated-at.bofh.it>
In reply to#1257417
On Tue, Oct 27, 2015 at 05:05:35PM -0500, Han Xu wrote:
>  
> -static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
> +static int mxs_dma_init(struct mxs_dma_engine *mxs_dma)

This change seems unrelated to patch description, can you explain why?

> +#ifdef CONFIG_PM_SLEEP
> +static int mxs_dma_pm_resume(struct device *dev)
> +{
> +	struct mxs_dma_engine *mxs_dma = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = mxs_dma_init(mxs_dma);
> +	if (ret)
> +		return ret;
> +	return 0;

why not return mxs_dma_init() then!

-- 
~Vinod
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