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Re: [OpenRISC] [PATCH 01/13] openrisc: use shadow registers to save regs on exception

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On Fri, Sep 1, 2017 at 10:02 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Wed, Aug 30, 2017 at 11:58 PM, Stafford Horne <shorne@gmail.com> wrote:
>> --- a/arch/openrisc/Kconfig
>> +++ b/arch/openrisc/Kconfig
>> @@ -121,6 +121,16 @@ config OPENRISC_NO_SPR_SR_DSX
>>           Say N here if you know that your OpenRISC processor has
>>           SPR_SR_DSX bit implemented. Say Y if you are unsure.
>>
>> +config OPENRISC_HAVE_SHADOW_GPRS
>> +       bool "Support for shadow gpr files"
>
> default y if SMP?

Oops, that's not sufficient.

bool "Support for shadow gpr files" if !SMP
default y if SMP

>> +       help
>> +         Say Y here if your OpenRISC processor features shadowed
>> +         register files. They will in such case be used as a
>> +         scratch reg storage on exception entry.
>> +
>> +         On SMP systems, this feature is mandatory.
>> +         On a unicore system it's safe to say N here if you are unsure.
>> +

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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[PATCH 00/13] OpenRISC SMP Support Stafford Horne <shorne@gmail.com> - 2017-08-31 00:00 +0200
  [PATCH 10/13] openrisc: add simple_smp dts and defconfig for simulators Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    [PATCH 13/13] openrisc: add tick timer multicore sync logic Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    [PATCH 12/13] openrisc: enable LOCKDEP_SUPPORT and irqflags tracing Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    Re: [PATCH 10/13] openrisc: add simple_smp dts and defconfig for  simulators Mark Rutland <mark.rutland@arm.com> - 2017-08-31 12:50 +0200
      Re: [PATCH 10/13] openrisc: add simple_smp dts and defconfig for  simulators Stafford Horne <shorne@gmail.com> - 2017-08-31 15:10 +0200
  [PATCH 09/13] openrisc: add cacheflush support to fix icache aliasing Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
  [PATCH 07/13] openrisc: fix initial preempt state for secondary cpu tasks Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
  [PATCH 04/13] openrisc: use qspinlocks and qrwlocks Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
  [PATCH 01/13] openrisc: use shadow registers to save regs on exception Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    Re: [OpenRISC] [PATCH 01/13] openrisc: use shadow registers to save  regs on exception Geert Uytterhoeven <geert@linux-m68k.org> - 2017-09-01 10:10 +0200
      Re: [OpenRISC] [PATCH 01/13] openrisc: use shadow registers to save  regs on exception Stafford Horne <shorne@gmail.com> - 2017-09-01 10:30 +0200
    Re: [OpenRISC] [PATCH 01/13] openrisc: use shadow registers to save  regs on exception Geert Uytterhoeven <geert@linux-m68k.org> - 2017-09-01 10:10 +0200
  [PATCH 05/13] irqchip: add initial support for ompic Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    Re: [PATCH 05/13] irqchip: add initial support for ompic Marc Zyngier <marc.zyngier@arm.com> - 2017-08-31 11:30 +0200
      Re: [PATCH 05/13] irqchip: add initial support for ompic Stafford Horne <shorne@gmail.com> - 2017-09-01 03:30 +0200
        Re: [PATCH 05/13] irqchip: add initial support for ompic Marc Zyngier <marc.zyngier@arm.com> - 2017-09-01 19:30 +0200
          Re: [PATCH 05/13] irqchip: add initial support for ompic Stafford Horne <shorne@gmail.com> - 2017-09-04 00:20 +0200
            Re: [PATCH 05/13] irqchip: add initial support for ompic Marc Zyngier <marc.zyngier@arm.com> - 2017-09-04 09:40 +0200
    Re: [PATCH 05/13] irqchip: add initial support for ompic Mark Rutland <mark.rutland@arm.com> - 2017-08-31 13:10 +0200
      Re: [PATCH 05/13] irqchip: add initial support for ompic Stafford Horne <shorne@gmail.com> - 2017-09-01 16:00 +0200
  [PATCH 03/13] openrisc: add 1 and 2 byte cmpxchg support Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    Re: [PATCH 03/13] openrisc: add 1 and 2 byte cmpxchg support Peter Zijlstra <peterz@infradead.org> - 2017-08-31 09:50 +0200
      Re: [PATCH 03/13] openrisc: add 1 and 2 byte cmpxchg support Stafford Horne <shorne@gmail.com> - 2017-08-31 11:10 +0200
  [PATCH 08/13] openrisc: sleep instead of spin on secondary wait Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
  [PATCH 02/13] openrisc: define CPU_BIG_ENDIAN as true Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200
    Re: [OpenRISC] [PATCH 02/13] openrisc: define CPU_BIG_ENDIAN as true Geert Uytterhoeven <geert@linux-m68k.org> - 2017-09-01 10:10 +0200
      Re: [OpenRISC] [PATCH 02/13] openrisc: define CPU_BIG_ENDIAN as true Stafford Horne <shorne@gmail.com> - 2017-09-01 10:30 +0200
  [PATCH 06/13] openrisc: initial SMP support Stafford Horne <shorne@gmail.com> - 2017-08-31 00:10 +0200

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