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[PATCH v5 13/16] dt-bindings: qcom_nandc: IPQ4019 QPIC NAND documentation

From Abhishek Sahu <absahu@codeaurora.org>
Newsgroups linux.kernel
Subject [PATCH v5 13/16] dt-bindings: qcom_nandc: IPQ4019 QPIC NAND documentation
Date 2017-08-17 14:10 +0200
Message-ID <ufrMD-4Ff-69@gated-at.bofh.it> (permalink)
References <ufrMB-4Ff-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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1. Qualcom IPQ4019 SoC uses QPIC NAND controller version 1.4.0
   which uses BAM DMA Engine while IPQ806x uses EBI2 NAND
   which uses ADM DMA Engine.
2. QPIC NAND will 3 BAM channels: command, data tx and data rx
   while EBI2 NAND uses only single ADM channel.
3. CRCI is only required for ADM DMA and its not required for
   BAM DMA.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---

* Changes from v4: None

 .../devicetree/bindings/mtd/qcom_nandc.txt         | 55 +++++++++++++++++++++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index f475b65..d93b952 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -1,11 +1,18 @@
 * Qualcomm NAND controller
 
 Required properties:
-- compatible:		should be "qcom,ipq806x-nand"
+- compatible:		must be one of the following:
+    * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
+			    SoC and it uses ADM DMA
+    * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
+                            IPQ4019 SoC and it uses BAM DMA
+
 - reg:			MMIO address range
 - clocks:		must contain core clock and always on clock
 - clock-names:		must contain "core" for the core clock and "aon" for the
 			always on clock
+
+EBI2 specific properties:
 - dmas:			DMA specifier, consisting of a phandle to the ADM DMA
 			controller node and the channel number to be used for
 			NAND. Refer to dma.txt and qcom_adm.txt for more details
@@ -16,6 +23,12 @@ Required properties:
 - qcom,data-crci:	must contain the ADM data type CRCI block instance
 			number specified for the NAND controller on the given
 			platform
+
+QPIC specific properties:
+- dmas:			DMA specifier, consisting of a phandle to the BAM DMA
+			and the channel number to be used for NAND. Refer to
+			dma.txt, qcom_bam_dma.txt for more details
+- dma-names:		must contain all 3 channel names : "tx", "rx", "cmd"
 - #address-cells:	<1> - subnodes give the chip-select number
 - #size-cells:		<0>
 
@@ -82,3 +95,43 @@ nand-controller@1ac00000 {
 		};
 	};
 };
+
+nand-controller@79b0000 {
+	compatible = "qcom,ipq4019-nand";
+	reg = <0x79b0000 0x1000>;
+
+	clocks = <&gcc GCC_QPIC_CLK>,
+		<&gcc GCC_QPIC_AHB_CLK>;
+	clock-names = "core", "aon";
+
+	dmas = <&qpicbam 0>,
+		<&qpicbam 1>,
+		<&qpicbam 2>;
+	dma-names = "tx", "rx", "cmd";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		reg = <0>;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "boot-nand";
+				reg = <0 0x58a0000>;
+			};
+
+			partition@58a0000 {
+				label = "fs-nand";
+				reg = <0x58a0000 0x4000000>;
+			};
+		};
+	};
+};
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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[PATCH v5 00/16] Add QCOM QPIC NAND support Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 01/16] mtd: nand: qcom: DMA mapping support for register read buffer Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 06/16] mtd: nand: qcom: erased codeword detection configuration Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 08/16] mtd: nand: qcom: QPIC data descriptors handling Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 16/16] mtd: nand: qcom: Support for IPQ8074 QPIC NAND controller Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 07/16] mtd: nand: qcom: enable BAM or ADM mode Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 14/16] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
    Re: [PATCH v5 14/16] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND  documentation Rob Herring <robh@kernel.org> - 2017-08-22 04:30 +0200
  [PATCH v5 05/16] mtd: nand: qcom: support for read location registers Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 12/16] dt-bindings: qcom_nandc: fix the ipq806x device tree example Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 11/16] mtd: nand: qcom: support for command descriptor formation Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
    Re: [PATCH v5 11/16] mtd: nand: qcom: support for command descriptor  formation Abhishek Sahu <absahu@codeaurora.org> - 2017-08-19 11:50 +0200
      Re: [PATCH v5 11/16] mtd: nand: qcom: support for command  descriptor formation Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-08-19 22:40 +0200
  [PATCH v5 10/16] mtd: nand: qcom: add command elements in BAM transaction Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
    Re: [PATCH v5 10/16] mtd: nand: qcom: add command elements in BAM  transaction Abhishek Sahu <absahu@codeaurora.org> - 2017-08-19 11:40 +0200
  [PATCH v5 03/16] mtd: nand: qcom: add BAM DMA descriptor handling Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 13/16] dt-bindings: qcom_nandc: IPQ4019 QPIC NAND documentation Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:10 +0200
  [PATCH v5 04/16] mtd: nand: qcom: support for passing flags in DMA helper functions Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:20 +0200
  [PATCH v5 15/16] mtd: nand: qcom: support for IPQ4019 QPIC NAND controller Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:20 +0200
  [PATCH v5 09/16] mtd: nand: qcom: support for different DEV_CMD register offsets Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:20 +0200
  [PATCH v5 02/16] mtd: nand: qcom: allocate BAM transaction Abhishek Sahu <absahu@codeaurora.org> - 2017-08-17 14:20 +0200
  Re: [PATCH v5 00/16] Add QCOM QPIC NAND support Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-08-21 22:20 +0200
    Re: [PATCH v5 00/16] Add QCOM QPIC NAND support Abhishek Sahu <absahu@codeaurora.org> - 2017-08-22 08:40 +0200

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