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Re: RISC-V Linux Port v6

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On Wed, Jul 12, 2017 at 09:58:01AM +0200, Arnd Bergmann wrote:
> On Wed, Jul 12, 2017 at 3:31 AM, Palmer Dabbelt <palmer@dabbelt.com> wrote:
> > At this point I'm not really sure how to proceed: reviews have calmed down
> > quite a bit over the last two weeks, but I'm not familiar with the Linux
> > development process enough to know how to get closer to upstream.  Is this
> > ready for inclusion into another tree?  If so, is linux-next the right tree to
> > work off of?
> 
> For the pci patch, ask Bjorn if he has a preference whether he wants
> to merge the patch or have you put it into your tree with his
> 'Acked-by' tag.

There is one pending issue with these patches, but other than the above
possibility the other one is to see if Bjorn is OK for these 2 PCI patches
to go through Andrew's tree for the current merge window with his Acked-by.

> > Of course, if anyone has outstanding code reviews then feel free to submit them
> > either to this patch set or a previous one (v5 is essentially the same, and v4
> > is mostly some small SMP fixes).  I don't want to rush anyone by re-submitting
> > so quickly, it's just that my usual protocol has been sped up.
> >
> > As usual, the patch set has been posted to our Git Hub page
> >
> >   https://github.com/riscv/riscv-linux/tree/riscv-for-submission-v6
> 
> There are a couple of downsides to hosting the git tree on github,
> so as you get nearer to inclusion, you should decide whether to
> have your own git server on riscv.org or sifive.com, or to get an
> account on kernel.org.
> 
> You should also make sure you get your gpg key signed by other
> kernel maintainers so you can properly sign git tags for pull requests.

I've met Palmer in person, and at the sifive offices and signed his key.
Recently Chris Metcalf <cmetcalf@tilera.com> also signed his key.

Indeed a kernel.org tree would be nicer, Palmer have you requested an
account yet?

  Luis

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RISC-V Linux Port v6 Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 03:40 +0200
  [PATCH 17/17] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 03:40 +0200
  [PATCH 07/17] irqchip: New RISC-V PLIC Driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 03:40 +0200
  [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 03:40 +0200
  [PATCH 15/17] RISC-V: Paging and MMU Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 03:40 +0200
  Re: RISC-V Linux Port v6 Arnd Bergmann <arnd@arndb.de> - 2017-07-12 10:00 +0200
    Re: RISC-V Linux Port v6 "Luis R. Rodriguez" <mcgrof@kernel.org> - 2017-07-12 16:00 +0200
    Re: RISC-V Linux Port v6 Will Deacon <will.deacon@arm.com> - 2017-07-12 20:00 +0200
      Re: RISC-V Linux Port v6 Arnd Bergmann <arnd@arndb.de> - 2017-07-12 21:40 +0200
  Re: [PATCH 16/17] RISC-V: User-facing API James Hogan <james.hogan@imgtec.com> - 2017-07-12 13:10 +0200
    Re: [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 18:30 +0200
      Re: [PATCH 16/17] RISC-V: User-facing API James Hogan <james.hogan@imgtec.com> - 2017-07-12 19:20 +0200
        Re: [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-14 00:00 +0200
  Re: [PATCH 10/17] RISC-V: Atomic and Locking Code Boqun Feng <boqun.feng@gmail.com> - 2017-07-12 14:50 +0200
  Re: [PATCH 10/17] RISC-V: Atomic and Locking Code Boqun Feng <boqun.feng@gmail.com> - 2017-07-12 14:50 +0200
    Re: [PATCH 10/17] RISC-V: Atomic and Locking Code Peter Zijlstra <peterz@infradead.org> - 2017-07-12 15:00 +0200
    Re: [PATCH 10/17] RISC-V: Atomic and Locking Code Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 19:20 +0200
  Re: [PATCH 10/17] RISC-V: Atomic and Locking Code Arnd Bergmann <arnd@arndb.de> - 2017-07-12 15:20 +0200

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