Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1600686
| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v4 3/5] phy: exynos-mipi-video: Use consistent method to address phy registers |
| Date | 2017-03-14 17:50 +0100 |
| Message-ID | <tkXO2-2Py-21@gated-at.bofh.it> (permalink) |
| References | <tkXO1-2Py-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Exynos4 MIPI phy registers are defined with macro calculating the offset
for given phyN. Use the same method for Exynos5420 to be consistent.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
drivers/phy/phy-exynos-mipi-video.c | 20 ++++++++++----------
include/linux/soc/samsung/exynos-regs-pmu.h | 4 +---
2 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c
index d7fe1f8c3ac8..acef1d92691e 100644
--- a/drivers/phy/phy-exynos-mipi-video.c
+++ b/drivers/phy/phy-exynos-mipi-video.c
@@ -110,46 +110,46 @@ static const struct mipi_phy_device_desc exynos5420_mipi_phy = {
/* EXYNOS_MIPI_PHY_ID_CSIS0 */
.coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
.enable_val = EXYNOS5_PHY_ENABLE,
- .enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
+ .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
.enable_map = EXYNOS_MIPI_REGMAP_PMU,
.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
- .resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
+ .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
}, {
/* EXYNOS_MIPI_PHY_ID_DSIM0 */
.coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
.enable_val = EXYNOS5_PHY_ENABLE,
- .enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
+ .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
.enable_map = EXYNOS_MIPI_REGMAP_PMU,
.resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
- .resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
+ .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
}, {
/* EXYNOS_MIPI_PHY_ID_CSIS1 */
.coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1,
.enable_val = EXYNOS5_PHY_ENABLE,
- .enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
+ .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
.enable_map = EXYNOS_MIPI_REGMAP_PMU,
.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
- .resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
+ .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
}, {
/* EXYNOS_MIPI_PHY_ID_DSIM1 */
.coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1,
.enable_val = EXYNOS5_PHY_ENABLE,
- .enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
+ .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
.enable_map = EXYNOS_MIPI_REGMAP_PMU,
.resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
- .resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
+ .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
}, {
/* EXYNOS_MIPI_PHY_ID_CSIS2 */
.coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
.enable_val = EXYNOS5_PHY_ENABLE,
- .enable_reg = EXYNOS5420_MIPI_PHY2_CONTROL,
+ .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(2),
.enable_map = EXYNOS_MIPI_REGMAP_PMU,
.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
- .resetn_reg = EXYNOS5420_MIPI_PHY2_CONTROL,
+ .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(2),
.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
},
},
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index 4ee54b3fcd57..c261ed927e1e 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -505,9 +505,7 @@
((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr))
#define EXYNOS5420_USBDRD1_PHY_CONTROL 0x0708
-#define EXYNOS5420_MIPI_PHY0_CONTROL 0x0714
-#define EXYNOS5420_MIPI_PHY1_CONTROL 0x0718
-#define EXYNOS5420_MIPI_PHY2_CONTROL 0x071C
+#define EXYNOS5420_MIPI_PHY_CONTROL(n) (0x0714 + (n) * 4)
#define EXYNOS5420_DPTX_PHY_CONTROL 0x0728
#define EXYNOS5420_ARM_CORE2_SYS_PWR_REG 0x1020
#define EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG 0x1024
--
2.9.3
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH v4 0/5] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-14 17:50 +0100
[PATCH v4 1/5] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-14 17:50 +0100
[PATCH v4 3/5] phy: exynos-mipi-video: Use consistent method to address phy registers Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-14 17:50 +0100
[PATCH v4 4/5] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-14 17:50 +0100
Re: [PATCH v4 4/5] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Lee Jones <lee.jones@linaro.org> - 2017-03-15 11:20 +0100
Re: [PATCH v4 4/5] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-15 12:10 +0100
Re: [PATCH v4 4/5] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Lee Jones <lee.jones@linaro.org> - 2017-03-15 13:20 +0100
Re: [PATCH v4 4/5] mfd: exynos-lpass: Use common soc/exynos-regs-pmu.h header Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-15 14:20 +0100
[GIT PULL] Immutable branch between MFD and PHY due for the v4.12 merge window Lee Jones <lee.jones@linaro.org> - 2017-03-23 12:00 +0100
Re: [GIT PULL] Immutable branch between MFD and PHY due for the v4.12 merge window Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-23 13:00 +0100
Re: [GIT PULL] Immutable branch between MFD and PHY due for the v4.12 merge window Kishon Vijay Abraham I <kishon@ti.com> - 2017-03-27 15:30 +0200
[PATCH v4 5/5] phy: exynos: Use one define for enable bit Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-14 17:50 +0100
Re: [PATCH v4 0/5] phy/mfd/soc: exynos: Header cleanup Kishon Vijay Abraham I <kishon@ti.com> - 2017-03-27 15:30 +0200
csiph-web