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Re: [PATCH 2/4] MIPS: microMIPS: Fix decoding of addiusp instruction

From "Maciej W. Rozycki" <macro@imgtec.com>
Newsgroups linux.kernel
Subject Re: [PATCH 2/4] MIPS: microMIPS: Fix decoding of addiusp instruction
Date 2017-03-01 03:00 +0100
Message-ID <tg1IB-48Z-5@gated-at.bofh.it> (permalink)
References <tfS2C-6kf-25@gated-at.bofh.it> <tg1IB-48Z-7@gated-at.bofh.it>
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On Tue, 28 Feb 2017, Matt Redfearn wrote:

> diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
> index 5b1e932ae973..6ba5b775579c 100644
> --- a/arch/mips/kernel/process.c
> +++ b/arch/mips/kernel/process.c
> @@ -386,8 +386,9 @@ static int get_frame_info(struct mips_frame_info *info)
>  
>  					if (ip->halfword[0] & mm_addiusp_func)
>  					{
> -						tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
> -						info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
> +						tmp = (ip->halfword[0] >> 1) & 0x1ff;
> +						tmp = tmp | ((tmp & 0x100) ? 0xfe00 : 0);
> +						info->frame_size = -(signed short)(tmp << 2);

 Ugh, this is unreadable -- can you please figure out a way to fit it in 
79 columns?  Perhaps by factoring this piece out?

 Also this:

	tmp = (ip->halfword[0] >> 1) & 0x1ff;
	tmp = tmp | ((tmp & 0x100) ? 0xfe00 : 0);

will likely result in better code without the conditional, e.g.:

	tmp = (((ip->halfword[0] >> 1) & 0x1ff) ^ 0x100) - 0x100;

(the usual way to sign-extend).

  Maciej

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Thread

[PATCH 0/4] MIPS: Further microMIPS stack unwinding fixes Matt Redfearn <matt.redfearn@imgtec.com> - 2017-02-28 16:40 +0100
  Re: [PATCH 1/4] MIPS: Handle non word sized instructions when  examining frame "Maciej W. Rozycki" <macro@imgtec.com> - 2017-02-28 22:00 +0100
    Re: [PATCH 1/4] MIPS: Handle non word sized instructions when  examining frame Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 15:10 +0100
  Re: [PATCH 2/4] MIPS: microMIPS: Fix decoding of addiusp  instruction "Maciej W. Rozycki" <macro@imgtec.com> - 2017-03-01 03:00 +0100
    Re: [PATCH 2/4] MIPS: microMIPS: Fix decoding of addiusp instruction Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 16:50 +0100
  [PATCH 4/4] MIPS: microMIPS: Fix decoding of swsp16 instruction Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 08:40 +0100
  [PATCH 2/4] MIPS: microMIPS: Fix decoding of addiusp instruction Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 08:40 +0100
  [PATCH 1/4] MIPS: Handle non word sized instructions when examining frame Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 08:40 +0100
  [PATCH 3/4] MIPS: Stacktrace: Fix __usermode() of uninitialised regs Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-01 08:40 +0100

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