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Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support

From "Baicar, Tyler" <tbaicar@codeaurora.org>
Newsgroups linux.kernel
Subject Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support
Date 2017-02-28 21:00 +0100
Message-ID <tfW6d-vq-5@gated-at.bofh.it> (permalink)
References <tdqau-8gh-3@gated-at.bofh.it> <tdqav-8gh-27@gated-at.bofh.it> <telBM-7lx-9@gated-at.bofh.it>
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Hello James,


On 2/24/2017 3:42 AM, James Morse wrote:
> On 21/02/17 21:22, Tyler Baicar wrote:
>> Currently external aborts are unsupported by the guest abort
>> handling. Add handling for SEAs so that the host kernel reports
>> SEAs which occur in the guest kernel.
>> diff --git a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h
>> index e22089f..33a77509 100644
>> --- a/arch/arm/include/asm/kvm_arm.h
>> +++ b/arch/arm/include/asm/kvm_arm.h
>> @@ -187,6 +187,7 @@
>>   #define FSC_FAULT	(0x04)
>>   #define FSC_ACCESS	(0x08)
>>   #define FSC_PERM	(0x0c)
>> +#define FSC_EXTABT	(0x10)
> arm64 has ESR_ELx_FSC_EXTABT which is used in inject_abt64(), but for matching
> an external abort coming from hardware the range is wider.
>
> Looking at the ARM-ARMs 'ISS encoding for an exception from an Instruction
> Abort' in 'D7.2.27 ESR_ELx, Exception Syndrome Register (ELx)' (page D7-1954 of
> version 'k'...iss10775), the ten flavours of you Synchronous abort you hooked
> with do_sea() in patch 4 occupy 0x10 to 0x1f...
>
>
>> diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
>> index a5265ed..04f1dd50 100644
>> --- a/arch/arm/kvm/mmu.c
>> +++ b/arch/arm/kvm/mmu.c
>> @@ -29,6 +29,7 @@
>>   #include <asm/kvm_asm.h>
>>   #include <asm/kvm_emulate.h>
>>   #include <asm/virt.h>
>> +#include <asm/system_misc.h>
>>   
>>   #include "trace.h"
>>   
>> @@ -1444,8 +1445,21 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
>>   
>>   	/* Check the stage-2 fault is trans. fault or write fault */
>>   	fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
> ... kvm_vcpu_trap_get_fault_type() on both arm and arm64 masks the HSR/ESR_EL2
> with 0x3c ...
>
>
>> -	if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
>> -	    fault_status != FSC_ACCESS) {
>> +
>> +	/* The host kernel will handle the synchronous external abort. There
>> +	 * is no need to pass the error into the guest.
>> +	 */
>> +	if (fault_status == FSC_EXTABT) {
> ... but here we only check for 'Synchronous external abort, not on a translation
> table walk'. Are the other types relevant?
I believe the others should be relevant here as well. I haven't been 
able to test the other types within a guest though.
> If so we need some helper as this range is sparse and 'all other values are
> reserved'. The aarch32 HSR format is slightly different. (G6-4411 ISS encoding
> from an exception from a Data Abort).
I can add a helper so that this if statement matches any of the 10 FSC 
values which are mapped to the do_sea in the host code.
> If not, can we change patch 4 to check this type too so we don't call out to
> APEI for a fault type we know isn't relevant.
>
>
>> +		if(handle_guest_sea((unsigned long)fault_ipa,
>> +				    kvm_vcpu_get_hsr(vcpu))) {
>> +			kvm_err("Failed to handle guest SEA, FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
>> +				kvm_vcpu_trap_get_class(vcpu),
>> +				(unsigned long)kvm_vcpu_trap_get_fault(vcpu),
>> +				(unsigned long)kvm_vcpu_get_hsr(vcpu));
>> +			return -EFAULT;
>> +		}
>> +	} else if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
>> +		   fault_status != FSC_ACCESS) {
>>   		kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
>>   			kvm_vcpu_trap_get_class(vcpu),
>>   			(unsigned long)kvm_vcpu_trap_get_fault(vcpu),
>> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
>> index b2d57fc..403277b 100644
>> --- a/arch/arm64/mm/fault.c
>> +++ b/arch/arm64/mm/fault.c
>> @@ -602,6 +602,24 @@ static const char *fault_name(unsigned int esr)
>>   }
>>
>>   /*
>> + * Handle Synchronous External Aborts that occur in a guest kernel.
>> + */
>> +int handle_guest_sea(unsigned long addr, unsigned int esr)
>> +{
>> +	if(IS_ENABLED(HAVE_ACPI_APEI_SEA)) {
>> +		nmi_enter();
>> +		ghes_notify_sea();
>> +		nmi_exit();
> This nmi stuff was needed for synchronous aborts that may have interrupted
> APEI's interrupts-masked code. We want to avoid trying to take the same set of
> locks, hence taking the in_nmi() path through APEI. Here we know we interrupted
> a guest, so there is no risk that we have interrupted APEI on the host.
> ghes_notify_sea() can safely take the normal path.
Makes sense, I can remove the nmi_* calls here.

Thanks,
Tyler

-- 
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

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Thread

[PATCH V11 00/10] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 03/10] efi: parse ARM processor error Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 09/10] trace, ras: add ARM processor error trace event Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 01/10] acpi: apei: read ack upon ghes record consumption Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 05/10] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
    Re: [PATCH V11 05/10] acpi: apei: handle SEA notification type for  ARMv8 Xie XiuQi <xiexiuqi@huawei.com> - 2017-03-01 08:50 +0100
      Re: [PATCH V11 05/10] acpi: apei: handle SEA notification type for  ARMv8 "Baicar, Tyler" <tbaicar@codeaurora.org> - 2017-03-01 20:40 +0100
  [PATCH V11 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
    Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support James Morse <james.morse@arm.com> - 2017-02-24 11:50 +0100
      Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support gengdongjiu <gengdj.1984@gmail.com> - 2017-02-27 12:50 +0100
      Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support "Baicar, Tyler" <tbaicar@codeaurora.org> - 2017-02-28 21:00 +0100
        Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support James Morse <james.morse@arm.com> - 2017-03-06 11:40 +0100
          Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support "Baicar, Tyler" <tbaicar@codeaurora.org> - 2017-03-06 15:10 +0100
    Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Xiongfeng Wang <wangxiongfeng2@huawei.com> - 2017-02-25 08:30 +0100
      Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support James Morse <james.morse@arm.com> - 2017-02-27 16:20 +0100
        Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Xiongfeng Wang <wangxiongfeng2@huawei.com> - 2017-02-28 07:40 +0100
          Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support James Morse <james.morse@arm.com> - 2017-02-28 14:30 +0100
            Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Xiongfeng Wang <wangxiongfeng2@huawei.com> - 2017-03-01 03:40 +0100
              Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Marc Zyngier <marc.zyngier@arm.com> - 2017-03-02 10:50 +0100
                Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support Xiongfeng Wang <wangxiongfeng2@huawei.com> - 2017-03-06 04:50 +0100
        Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support gengdongjiu <gengdj.1984@gmail.com> - 2017-03-06 02:40 +0100
  [PATCH V11 07/10] efi: print unrecognized CPER section Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 08/10] ras: acpi / apei: generate trace event for unrecognized CPER section Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 06/10] acpi: apei: panic OS with fatal error status block Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100
  [PATCH V11 04/10] arm64: exception: handle Synchronous External Abort Tyler Baicar <tbaicar@codeaurora.org> - 2017-02-21 22:30 +0100

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